Patterning of Miniaturized Oxide TFTs with High-Resolution Reverse-Offset Printing for Low-Voltage IoT Applications

Oxide thin-film transistors (TFTs) are key electronic components applied in display backplanes and flat panel X-ray detectors due to their high mobility, low off current, and low temperature processing. Their use in back-end-of-line (BEOL) applications, in highly sensitive biosensors, and in flexible integrated circuits (ICs) are also under active research. Oxide TFTs can be fabricated using vacuum processes, such as sputtering and atomic layer deposition (ALD), as well as through low-cost, solution-based processes including printing [1]. Critical to the implementation of such TFTs in flexible ICs for Internet-of-Things (IoT) and wearable applications are: (i) low-voltage operation (≤ 5 V) (enabling low power operation), (ii) small device size (≤ 5 µm) (avoiding impractically large circuit footprints and increasing yield), and (iii) high charge carrier mobility (≥ 10 cm²/(Vs)) (enabling sufficient operation frequency and/or gain).<br/><br/>We have developed a versatile, high-resolution patterning method of thin films that is based on reverse-offset printing (ROP) of a polymer resist at µm-level resolution. The technique can be used to fabricate both solution- and vacuum deposited oxide TFTs down to 2.5 µm channel lengths. The steep sidewalls of the printed polymer allow it to be employed as a sacrificial layer to pattern vacuum-deposited metal (e.g., Al, Cu, Ti/Au) via lift-off process [2]. The patterned layers can be used both as gate and source/drain (S/D) contacts to the TFTs as well as sensor electrodes [3]. This can help to avoid problems (e.g. stability) associated with S/D-contacts that are printed with nanoparticle inks [4]. Moreover, we demonstrate that the same ROP resist can also be used as an etch mask to pattern a solution-processed, ALD-grown, or sputtered oxide semiconductor and gate dielectric thin films.<br/><br/>Here, we discuss the fabrication process and the electrical performance of <i>n</i>-type oxide TFTs with solution-processed In₂O₃ as well as ALD-grown ZnO and In₂O₃ semiconductors that are patterned using ROP down to 5 µm channel lengths. Depending on the semiconductor fabrication process and the device stack and geometry, we achieve TFTs that operate at ≤ 5 V and show ~3 – 10 cm²/(Vs) mobility, high ON/OFF-ratio &gt;10⁷, and turn-on voltage close to 0 V. By using unipolar pseudo-CMOS circuit topology, flexible ICs can be developed for IoT and wearable application, reducing the need for Si-chips. The use of benign and Earth-abundant materials palette, such as ZnO, enables the development of sustainable IoT sensor platforms.<br/><br/><b>Acknowledgements</b><br/>This work was funded in part by the Academy of Finland (under Grant Agreements No. 328627 FLEXRAD, No. 353220 SOIL, and No. 350948 HI-PHOTO-SINTER) and in part by Horizon Europe, the European Union’s Framework Programme for Research and Innovation, under grant agreements 101096021 (SUPERIOT) and 101070167 (ECOTRON).<br/><br/><b>References</b><br/>[1] L. Gillan, S. Li, J. Lahtinen, C. H. Chang, A. Alastalo, and J. Leppäniemi, “Inkjet-Printed Ternary Oxide Dielectric and Doped Interface Layer for Metal-Oxide Thin-Film Transistors with Low Voltage Operation,” <i>Adv. Mater. Interfaces</i>, vol. 8, no. 12, 2021.<br/>[2] A. Sneck, H. Ailas, F. Gao, and J. Leppäniemi, “Reverse-Offset Printing of Polymer Resist Ink for Micrometer-Level Patterning of Metal and Metal-Oxide Layers,” <i>ACS Appl. Mater. Interfaces</i>, vol. 13, pp. 41782–41790.<br/>[3] F. Liu, A. Sneck, A. Alastalo, and J. Leppäniemi, “Oxide TFTs with S/D-contacts patterned by high-resolution reverse-offset printed resist layers,” <i>Flex. Print. Electron.</i>, vol. 8, p. 015017, 2023.<br/>[4] F. Liu, L. Gillan, J. Leppäniemi, and A. Alastalo, “Focused Review on Print-Patterned Contact Electrodes for Metal-Oxide Thin-Film Transistors,” <i>Adv. Mater. Interfaces</i>, vol. 10, no. 7, p. 2202258, 2023.