High Throughput Specimen Architecture for In-Situ Transmission Electron Microscopy

In-situ Transmission Electron Microscopy (TEM) provides powerful insights into material synthesis, processing and failure. Of particular importance are in-situ heating experiments due to the importance of temperature in a wide variety of kinetic and thermodynamic processes. The current state of the art microheaters on silicon nitride membranes provide rapid and precise heating and are compatible with a wide variety of material systems. However, a limitation of in-situ TEM is the rate at which experiments may be conducted, primarily due to the time needed for sample preparation, preventing the acquisition of statistically robust datasets or adequate probing of parameters.<br/><br/>To address this concern, we propose and fabricate a new specimen architecture in which multiple individual microheaters are patterned on a single device. An array of microheaters on a silicon nitride window is fabricated using traditional Micro Electrical and Mechanical Systems (MEMS) techniques. To make the architecture scalable and compatible with a wide range of existing systems, Complementary Metal Oxide Semiconductor (CMOS) logic is introduced directly onto the device, allowing for control of a large number of devices with only four electrical contacts to the sample holder. On a prototype device this is achieved via bump bonding of a commercial, off the shelf digital to analog converter capable of driving eight microheaters directly onto the microheater array. Fabrication, testing and temperature calibration of the microheater array will be discussed.<br/><br/>To test the utility of this concept, the kinetics of the amorphous to crystalline transition in the magnetron sputtered phase change material Ge4Sb4Se2Te1 will be explored utilizing this chip in a conventional TEM, generating movies based on intensive use of real space imaging and diffraction to determine the crystallinity as a function of temperature and time. The impact of these experiments for nucleation statistics and rapid exploration of the Time Temperature Transformation (TTT) diagram will be discussed.<br/><br/>To scale up this concept to larger numbers of microheaters, an application specific integrated circuit (ASIC) is designed and fabricated at the 150nm CMOS node to integrate logic directly into the same silicon housing the microheaters and membrane, anticipated to allow for independent and simultaneous driving of up to 100 devices. Design and integration with existing MEMS fabrication will be discussed, as will the broader applications and implications for high throughput materials research.