Enhancing Neuromorphic Computing Through Ferroelectric-Tuned a-SiZnSnO Based Synaptic Transistors and Multilayer Perceptron Neural Networks

The von Neumann architecture underpins most of today's advanced computers. However, the efficiency of these systems is constrained by the speed at which data can be transferred between the central processing unit (CPU) and memory. Additionally, these computers consume a significant amount of energy when processing large amounts of data. In contrast, biological computing systems like the human brain can effortlessly handle complex problems while expending energy in the range of femtojoules per spike (fJ/spike). Therefore, brain-inspired artificial synapses neuromorphic computing devices can enhance the performance of the electronic systems beyond von- Neumann architecture.<br/><br/>Three terminal transistors are highly suitable for synaptic devices due to their parallel processing capability and memory functions. Additionally, a standard three-terminal field-effect thin-film transistor mimics biological synapses. In this analogy, the gate voltage (V_gs) functions as the presynaptic input terminal, while drain current (I_ds) serves as the post-synaptic output terminal. In this work, we have designed ferroelectric-tuned synaptic transistors via integrating a flexible copolymer, poly(vinylidene fluoride-trifluoroethylene) (P(VDF-TrFE)), as the gate insulator alongside an amorphous-SiZnSnO (a-SZTO) channel layer. To enhance the stability, we introduced an ultra-thin layer of ZrO₂ (5 nm) between a-SZTO and P(VDF-TrFE). This ZrO₂ layer was subjected to Ar plasma treatment to render it hydrophilic, ensuring the uniform deposition of P(VDF-TrFE) layer. Devices with ZrO₂ integration demonstrated excellent stability over prolonged durations. The P(VDF-TrFE) layer was treated at 140 ^oC to form the β-phase, where ferroelectricity becomes prominent. The a-SZTO ferroelectric TFT with P(VDF-TrFE) exhibits counterclockwise hysteresis, a typical characteristic of ferroelectric field effect transistors. Further, a memory window of over 17 V was observed when sweeping between ±30 V. The postsynaptic currents (PSCs) were measured by applying 150 potentiation and 150 depression input pulses with different polarities of ±7 V and ±10 V for 1 s. Under potentiation and depression conditions, the devices demonstrated stable long-term potentiation (LTP) and long-term depression (LTD) behavior, respectively. A very high dynamic range (maximum conductance/ minimum conductance: G_max/G_min) of 515 was observed for the ±10 V pulse. Finally, a multilayer perceptron (MLP) neural network was constructed with 400 input neurons, 100 hidden neurons, and 10 output neurons, with artificial synapses connecting these neurons. The input dataset consists of a handwritten digit from the Modified National Institute of Standards and Technology (MNIST) database, using “MLP NeuroSim+ V3.0” for the simulation. The neural network simulation showed a high recognition accuracy of over 75% for the handwritten digits. The combination of high recognition accuracy and exceptional stability in these devices indicates their promising potential for use in neuromorphic applications.