Gate-Tunable Homojunction of 2D Semiconductor for Low-Power Electronics

Recently, low power consumption in both the static and dynamic modes of operation has been crucial for the successful development of next generation electronic devices. However, continuous down-scaling of transistors faces a bottleneck due to power consumption issues, such as leakage current and operating voltage. In this regard, two-dimensional (2D) semiconductors have been considered as promising candidates for low-power transistors owing to efficient gate-tunability and absence of short channel effect even in the ultra-scaled size. Here, we demonstrate gate-tunable homojunction of 2D semiconductor for low-power electronics. The barrier within 2D homojunction is freely modulated by a graphene gate without any interference, such as Fermi-level pinning. Benefiting from the gate-tunable barrier, our device showed a very low off-current of 10^-16 A/μm due to suppressed electron transport in off-state of 2D channel, indicating low power consumption in the static mode of operation. Furthermore, our device exhibited a low subthreshold swing of 58 mV/decade, which is close to the Boltzmann limit. It is the first approach to measure an off-current and achieve an extremely low off-current using diode-like structure in 2D channel. Our 2D transistor with partial gate shows a great potential in low power electronics that request low off-current and subthreshold swing.