Dec 5, 2024
11:00am - 11:15am
Sheraton, Second Floor, Back Bay C
Hyunbin Choi1,Hyunho Seok1,Sihoon Son1,Dongho Lee1,Geonwook Kim1,Seowoo Son1,Geumbeom Lee1,Wookhee Jeon1,Taesung Kim1
Sungkyunkwan University1
Hyunbin Choi1,Hyunho Seok1,Sihoon Son1,Dongho Lee1,Geonwook Kim1,Seowoo Son1,Geumbeom Lee1,Wookhee Jeon1,Taesung Kim1
Sungkyunkwan University1
Recent research has increasingly focused on addressing the bottleneck issues inherent in conventional von Neumann computer architectures by using memristors array that emulate artificial neural networks. Among various memristor materials, such as oxide-based materials, organic materials, and 2D materials, Transition Metal Dichalcogenides (TMDs) have garnered significant attention due to their physical stability, versatile electrical properties facilitated by modifiable material characteristics, confined perform in atomic scale and low-power operation. However, in array structures for integrated systems, there are persistent challenges with multilevel implementation due to various electrical issues such as sneak currents and crosstalk. To resolve the issues, structures such as 1T1R (Transistor and memristor) and 1S1R (Selector and memristor) have been proposed. Nevertheless, the channel materials differences between data access devices and memristors are potentially causing processing issues and undesirable chemical interactions between the channel materials. In this study, we experimentally demonstrate the successful integration of high-crystallinity TMDs layers for transistor channels and low-crystallinity TMDs layers for memristor operation on a single wafer, which achieved through two distinct synthesis methods, forming a densely packed on array structure that function reliably.