Investigation of Thermal Disturbance in Vertically Stacked Phase-Change Memory Using Multiphysics Simulation by Coupling Phase-Field and Electrothermal Models

Phase-change memory (PCM) is currently regarded as the most commercially viable technology among emerging non-volatile memory options due to its high density, long endurance, and large resistance window. Historically, thermal disturbance (TD) has been a limiting factor in increasing the density of a memory array because sufficient spacing between cells is required. The TD refers to unwanted data change caused by recrystallization occurring in neighboring unselected reset state cells due to excessive heat generated during reset operation of the selected cell. Device simulation of a cell array is important since it is practically impossible to directly measure the internal temperature distribution during PCM operation.<br/>In this work, we use our multiphysics model to explore ways to mitigate TD in a vertically stacked PCM device. By coupling electrothermal and phase-field models in commercial finite-element software, COMSOL Multiphysics, we can simulate not only the temperature distribution in the cell array but also the partial crystallization in a reset cell, and finally obtain the resulting resistance change. The variation of the critical dimensions and their influences on the TD will be investigated. It will be also shown that a modification of the device structure, heater recess, can reduce the heat transfer to neighboring cells while lowering the reset energy.<br/><br/>Keywords: <i>Phase-change memory (PCM), Thermal disturbance (TD), Simulation, Electrothermal, Phase-field, Crystallization, Interface</i>