Residue-Free 2D-Transfer Technology for High-Performance Field-Effect Transistors

Three-dimensional (3D) silicon technology suffers from degradation of FET performances beyond sub-3-nm technology node. One-atom thick (~0.7 nm) two-dimensional (2D) transition metal dichalcogenides (TMDs) offer an ideal FET platform and have been investigated intensively during the last decade to achieve high-performance FETs. Nevertheless, practical applications of TMD-based FETs are limited due to wafer-scale integration incapability and fabrication-provoked residues.<br/>Such atomically thin fragile TMD materials further require transfer to a desired gate dielectric substrate by facilitating mechanical supporting holder. Traditionally, polymethyl methacrylate (PMMA) is used as a supporting holder for device transfer. PMMA leaves notorious insulating residues on TMD surface which often generates mechanical damage to the TMD during transfer. Over the last two decades, the removal of PMMA residues has been a major obstacle in the semiconductor community, although its origin remains arguable. Nevertheless, residues and mechanical damages are inevitably introduced during transfer under ambient conditions. Moreover, such residues adhered at the interface, especially between metal-semiconductor contact, often degrade FET performances.<br/>Here, we show a residue-free transfer of CVD-grown TMD samples using polypropylene carbonate (PPC) as a supporting holder which leaves negligible residue coverage of ~0.08% on the TMD surface compared to traditional PMMA (~35%). PPC was previously used as a stamping holder in the typical dry-transfer process. However, the stamping technique is suitable for the monolayer flake size of as small as 30-40 µm. A larger TMD flake size transferred by the conventional stamping technique introduces wrinkling, mechanical damage, and transfer inhomogeneity. A conventional stamping technique cannot be implemented for CVD-grown large samples for integrated circuits. A wafer-scale, residue-free wet-transfer process is deemed necessary for electronics integration.<br/>Here we introduce a residue-free wet-transfer approach in which PPC-enabled transfer can address supporting holder contamination and flake wrinkling in the large-area homogeneous transfer of CVD-TMDs. FET device fabricated by PPC method with CVD-grown monolayer MoS₂ reveals Ohmic contact resistance of R_C ~78 Ω-µm close to the quantum limit due to the absence of interfacial residues between MoS₂ and semimetal Bi. An ultrahigh current on/off ratio of ~10¹¹ at 15 K was also achieved using the h-BN substrate. Our device exhibits state-of-the-art FET performances among all other previously reported literature values.<br/><br/><br/>Reference:<br/>1) Ashok Mondal, Chandan Biswas*, Sehwan Park, Wujoon Cha, Seoung-Hun Kang, Mina Yoon, Soo Ho Choi, Ki Kang Kim & Young Hee Lee*, Low Ohmic contact resistance and high on/off ratio in transition metal dichalcogenides field-effect transistors via residue-free transfer, <b><i>Nature Nanotechnology</i></b> 2024, 19, 34–43. DOI: https://doi.org/10.1038/s41565-023-01497-x<br/><br/>2) Giulia Pacchioni, Cleaner transfer, better transistors, <b><i>Nature Reviews Materials</i></b> 2023, 8, 641 DOI: https://doi.org/10.1038/s41578-023-00599-1