Dec 5, 2024
8:00pm - 10:00pm
Hynes, Level 1, Hall A
Ojun Kwon1,Seyoung Oh1,Byungjin Cho1
Chungbuk National University1
Ojun Kwon1,Seyoung Oh1,Byungjin Cho1
Chungbuk National University1
The performance of artificial intelligence (AI) such as conversational chatbots and autonomous driving is limited by significant energy consumption and delays in task execution. To address this challenge, brain-inspired neuromorphic hardware that mimics the function of synapses and neurons has attracted considerable attention as next-generation AI hardware. For the focus on demonstrating the neuromorphic components, a number of attempts to enhance synaptic performance have been made: synaptic devices with linear and symmetrical weight updates, and excellent endurance. While numerous memorization mechanisms emulating biological synapses have been reported, the phenomenon of frequency-dependent interference during synaptic signal transmission remains unexplored. A comprehensive investigation into how frequency influences signal transmission could significantly enhance the selectivity of weight updates, offering a promising solution to the complexities of neuromorphic circuitry.<br/>In this study, we investigated frequency-dependent mixed synaptic plasticity, which is mainly due to Al<sub>2</sub>O<sub>3</sub>/HfO<sub>2</sub> high-k dielectric double layer. We successfully demonstrated 8×8 synaptic transistor arrays, consisting of an IGZO channel layer and Al<sub>2</sub>O<sub>3</sub>/HfO<sub>2</sub> high-k dielectric functional layer to emulate biological synaptic plasticity. Initially, we observed controllable variation in the I<sub>DS</sub>-V<sub>BG</sub> hysteresis loops depending on the sweeping speed of The V<sub>BG</sub>. Interestingly, I<sub>DS</sub>-V<sub>BG</sub> hysteresis loop began with counter-clockwise direction and then crosses at 1.5 V, and finally then transition to a clockwise loop at a relatively slow V<sub>BG</sub> sweep speed range. However, as the V<sub>BG</sub> sweep speed increases, the clockwise loop gradually decreased. The V<sub>BG</sub> sweep speed over 800 mV/sec, I<sub>DS</sub>-V<sub>BG</sub> curves exclusively showed only a counter-clockwise direction. These phenomena are apparently reproducible for repeated sweep, regardless of V<sub>BG</sub> sweep range. It indicates that trade-off between charge trapping and the ferroelectric dipole effect exist, which is effectively controlled by operation speed. Therefore, the use of this novel device structure successfully mimics diverse patterns of synaptic function. During low-frequency stimulation, positive gate pulses induced depression, while negative gate pulses elicited facilitation response. Interestingly, high-frequency positive gate inputs induced facilitation, reversing the effect observed at low frequencies. Long-term potentiation and depression characteristics in the low-frequency region exhibited nonlinearity of 0.83, close to the ideal value of 0. In contrast, in high-frequency region, weight updates showed a higher nonlinearity of 4.08. The postsynaptic current changes stimulated by consecutive gate pulses maintained conductance state during retention tests in both frequency region, which demonstrates long-term memory characteristics. The synaptic transistor is a promising candidate for neuromorphic systems as an essential synaptic component, evidenced by its high recognition accuracy (~97.03%) in deep neural network simulations, based on the training and inference of handwritten digits. Furthermore, by adjusting only the frequency of input pulses while maintaining identical amplitude, both facilitation and depression responses could be simultaneously emulated, which is exactly different from the variable synaptic plasticity typically featured with different voltage polarity in most of previous reports. This unique capability mimics the diverse synaptic functions of biological synapses during signal transmission, paving the way for simpler neuromorphic circuitry to address increasingly complex tasks with greater efficiency and sophistication.