December 1 - 6, 2024
Boston, Massachusetts
Symposium Supporters
2024 MRS Fall Meeting & Exhibit
EL03.05.03

Wafer-Scale Transistor Arrays Fabricated Using Slot-Die Printing of Molybdenum Disulfide and Sodium-Embedded Alumina

When and Where

Dec 3, 2024
2:45pm - 3:00pm
Sheraton, Second Floor, Back Bay C

Presenter(s)

Co-Author(s)

Yonghyun Kwon1,InCheol Kwak1,Seonkwon Kim1,Soo Young Cho1,Seung Yeon Ki1,Jihyeon You1,Seonmi Eom1

Yonsei University1

Abstract

Yonghyun Kwon1,InCheol Kwak1,Seonkwon Kim1,Soo Young Cho1,Seung Yeon Ki1,Jihyeon You1,Seonmi Eom1

Yonsei University1
Two-dimensional materials made via solution processing could be used to create next-generation electronic devices at scale. However, existing solution processing methods typically have a trade-off between scalability and material quality, which makes them unsuitable for practical applications. Here we show that wafer-scale arrays of molybdenum-disulfide-based transistors can be fabricated using a commercial slot-die printing process. We create inks of molybdenum disulfide nanosheets and sodium-embedded alumina for printing of the semiconductor and gate dielectric layer, respectively. The transistors exhibit average charge carrier mobilities of 80.0 cm<sup>2 </sup>V<sup>-1 </sup>s<sup>-1</sup> in field-effect transistor measurements and 132.9 cm<sup>2 </sup>V<sup>-1 </sup>s<sup>-1</sup> in Hall measurements at room temperature. The high charge carrier mobility is attributed to the sodium-embedded alumina gate dielectric, which causes a band-like charge carrier transport in the molybdenum-disulfide-nanosheet-based thin-film networks. We use the transistors to create various logic gates, including NOT, NOR, NAND and static random-access memory.

Keywords

2D materials | solvent casting

Symposium Organizers

Deji Akinwande, The University of Texas at Austin
Cinzia Casiraghi, University of Manchester
Carlo Grazianetti, CNR-IMM
Li Tao, Southeast University

Session Chairs

Chandan Biswas
Amalia Patane

In this Session