C. Daniel Frisbie, Univ of Minnesota
Moon Sung Kang, Soongsil University
Karl Leo, Dresden Integrated Center for Applied Physics and Photonic Materials
Takao Someya, University of Tokyo
EM6.1: High-Performance TFT
Monday AM, November 28, 2016
Hynes, Level 3, Room 312
9:00 AM - *EM6.1.01
Fast Organic Complementary Circuits on Flexible Substrates
Hagen Klauk 1
1 Max Planck Institute for Solid State Research Stuttgart GermanyShow Abstract
Organic thin-film transistors (TFTs) can typically be fabricated at temperatures below 150 °C and thus not only on glass substrates, but also on a variety of unconventional substrates, such as plastics, paper and textiles. This makes organic TFTs potentially useful for the realization of flexible, large-area electronics applications, such as rollable or foldable displays and conformable sensor arrays. In some of the more advanced applications envisioned for organic TFTs, such as the integrated row and column drivers of flexible active-matrix organic light-emitting diode (AMOLED) displays, the TFTs have to be able to control electrical signals of a few volts at frequencies of several megahertz. The first requirement for achieving high switching frequencies is efficient charge transport in the semiconductor. This requirement can be met by choosing organic semiconductors that provide good molecular ordering and large carrier mobilities, even when processed at low temperatures. Examples are the thienoacene DNTT and its alkylated or phenylated derivatives for p-channel TFTs [1,2] and the core-cyanated perylene diimide derivative Polyera ActivInk N1100 for n-channel TFTs [3,4]. The second requirement is a small channel length . To meet this requirement, we have developed a process in which the TFTs are patterned using high-resolution silicon stencil masks. With this process, bottom-gate, top-contact organic TFTs with a channel length of 1 µm can be fabricated on flexible polyethylene naphthalate (PEN) substrates . The gate dielectric is a combination of oxygen-plasma-grown aluminum oxide and an alkyl or fluoroalkyl-phosphonic acid self-assembled monolayer (SAM). Due to its small thickness (5.3 nm), the TFTs can be operated with voltages of about 2 to 3 V. For 11-stage complementary and unipolar ring oscillators based on TFTs with a channel length of 1 µm, signal propagation delays per stage as short as 6.6 µs and 420 ns have been measured at a supply voltage of 3 V [7,8].  K. Niimi et al., Org. Lett. 13, 3430, 2011.  R. Hofmockel et al., Org. Electronics 14, 3213, 2013.  B. A. Jones et al., Angew. Chem. Int. Ed. 43, 6363, 2004.  J. Soeda et al., Adv. Mater. 23, 3681, 2011.  M. Kitamura et al., Appl. Phys. Express 4, 051601, 2011.  T. Zaki et al., IEEE J. Solid-State Circuits 47, 292, 2012.  U. Kraft et al., Adv. Mater. 27, 207, 2015.  U. Zschieschang et al., Org. Electronics, 14, 1516 2013.
9:30 AM - *EM6.1.02
Flexible a-IGZO Thin-Film Transistor—From Devices to RF Circuits for Bio-Signals Amplification
Giovanni Antonio Salvatore 1
1 ETH ZUrich Zurich SwitzerlandShow Abstract
Deformable wireless sensors, bendable radio frequency transceiver and high resolution flexible displays require electronic circuits which operate above tens of megahertz in order to efficiently treat signals, address local parts of the system and transmit data to the external world. The basic components of all these flexible circuits are thin film transistors (TFTs).
Depending on the application, there are parameters which are more important than others in evaluating the TFTs performance. In digital circuits the TFTs must have excellent switching capabilities, on–off current ratio greater than 105, and symmetrical threshold voltages, i.e. VTH,n = −VTH,p. In radio frequency (RF) circuit, switching capabilities are not required per se. For high-speed applications, TFTs should respond quickly to variations in the gate voltage: this practically means short gates and fast carriers in the channel. The cut-off frequency, fT, is the most widely used figure of merit for RF devices and is defined as the frequency at which the current gain reaches the unity. It can be maximized by making the intrinsic transconductance, gm, as large as possible and making the drain conductance, gds, the gate capacitance and source/drain contact resistances as small as possible. Drain-current saturation is also necessary to maximize the intrinsic voltage gain, Gint = gm/gds, which has become a popular figure of merit for mixed-signal circuits. Channel length scaling is the most straightforward approach to achieve high frequency operation but it is very challenging in case of direct fabrication on plastic foils. This explains the continuous search for high mobility materials which can be processed at low temperature.
Research in recent years has established a-IGZO as the semiconductor for thin film transistors. Such technology offers several attractive properties including optical transparency, large band gap (3eV) covering the UV-spectrum, high mobility (10cm2/Vs), low temperature and large area deposition and operational stability. Moreover, existing data and preliminary experiments demonstrate that IGZO is biocompatible, in fact, Ga and In are approved as alloys by the US food and drug administration and ZnO at concentration<100ug/ml is biocompatible and water soluble.
This talk begins by providing some design guidelines and technological insights to achieve ultraflexible a-IGZO TFTs with a transient frequency above 100MHz[4, 5] and proceeds by showing examples of analog amplifiers which can be used in RF applications and in the amplification of biosignals.
 F. Schwierz, Nat. Nanotech., vol. 5, pp. 487-496, 2010.
 E. Fortunato, et al., Adv. Mat., vol. 24, pp. 2945-2986, 2012.
 K. Nomura, et al., Nature, vol. 432, pp. 488-492, 2004.
 N. Münzenrieder, et al., Appl. Phys. Lett., vol. 105, p. 263504, 2014.
 G. A. Salvatore, et al., Nat Commun, vol. 5, 01/07/online 2014.
 D. Karnaushenko, et al., Adv. Mat., vol. 27, pp. 6797-6805, 2015.
10:00 AM - EM6.1.03
Flexible Zinc-Tin Oxide Thin-Film Transistors Operating at 1kV to Drive Soft Actuators
Alexis Marette 1 , Danick Briand 1 , Alexandre Poulin 1 , Samuel Rosset 1 , Herbert Shea 1
1 STI-IMT-LMTS Ecole Polytechnique Fédérale de Lausanne Neuchatel SwitzerlandShow Abstract
We demonstrate a zinc-tin oxide high-voltage thin-film transistor (HVTFTs) on polyimide integrated as a switch to drive 1 kilovolt dielectric elastomer actuators (DEAs) with 30 Volts gate control. DEAs find applications where their flexibility and high strain (>50%) provide unique advantages, such as in soft robotic, tunable optics, and haptic interfaces. However, they require high driving voltages, which makes controlling large actuator arrays challenging. HVTFTs enable the actuation of a large number of DEAs with a single common high voltage line. This paves the way towards new applications, such as multiple-degree-of-freedom soft robotic, self-switching and automation.
The high-voltage thin-film transistor uses a top-gate, coplanar electrode architecture. A layer of zinc-tin oxide is spincoated on a polyimide substrate coated with a 20nm layer of alumina. The oxide semiconductor is synthesized at 450°C under air. Then, 200nm aluminum source and drain electrodes are evaporated through a shadow mask. For the gate dielectric, we first passivate the semiconductor with atomic layer deposition of 100nm alumina. Then, 1µm parylene is added to the dielectric layer to achieve 400 V dielectric breakdown voltage. We then do aluminum gate evaporation. The gate is offset from the drain by several tens of microns. We show how critical this offset is to achieve kV transistor breakdown voltage. At the end, we open the source and the drain contact by laser ablation through the dielectric layer.
We use the transistor substrate as the frame for the suspended DEA membrane. The DEA is a thin-PDMS elastomeric membrane between two stretchable carbon electrodes. It behaves as a high-voltage stretchable capacitor with a quadratic strain response to voltage application. We then stencil print a silver line to connect the DEA and the transistor. Demonstration of a DEA driven by a high-voltage TFT is achieved and characterized by measuring the diaphragm deflection versus the applied gate voltage. When a drain voltage of 1kV is applied to the transistor, the deflection of the actuator can be controlled between 0 and 300um by modulating the gate voltage between 30V and 0V. We demonstrate an array of high-voltage thin-film transistors driving 4x4 matrix of dielectric elastomer actuator diaphragms, with microcontroller control of the gates and the drain being connected through a pull-up resistor configuration to a single 1kV supply.
We also show the potential of a migration of the HVTFT cleanroom process to a fully printed process to directly print the transistors on the DEA frames. Comparison of the two fabrication methods will be presented and the challenges will be highlighted.
10:15 AM - EM6.1.04
High-Performance Low-Voltage Operation in Polymer TFTs for Large-Area Electronics
Vincenzo Pecunia 1 2 , Mark Nikolka 2 , Henning Sirringhaus 2
1 Institute of Functional Nano amp; Soft Materials (FUNSOM) Soochow University Suzhou China, 2 Cavendish Laboratory University of Cambridge Cambridge United KingdomShow Abstract
Polymer semiconductors have long captured great academic and industrial interest for their potential in large-area electronics. This is in view of their facile solution processability, potentially low manufacturing cost, and the possibility of deployment in a variety of non-traditional situations (e.g., on substrates made of plastics, paper, wood, in cars and buildings, and on the human body).
Much sough-after for battery-powered applications, low-voltage operation in polymer transistors poses unique challenges that are intimately related to their charge-transport physics, namely large threshold voltages and shallow subthreshold slopes. These challenges have been typically addressed in terms of channel charge density and channel-gate capacitive coupling, both of which are enhanced by increasing the permittivity of the gate dielectric and reducing the thickness of the same.1–3 Surprisingly, however, no clear implication for low-voltage operation has been brought to the fore in respect to the longitudinal field dependence of transport and injection processes, which are characteristic of polymer semiconductors.
This study sheds light on the low-voltage operation of polymer semiconductor transistors. With a focus on IDT-BT, a polymer with rather unique nearly “disorder-free” transport properties,4 we show that a mere enhancement of the channel-gate capacitive coupling is not sufficient for low-voltage transistor operation. We thus experimentally identify the underlying causes of this behavior, and present material strategies that successfully override them, leading to high-performance transistor operation at below 3V.
The technological significance of this study is finally demonstrated, in the form of a two-stage differential amplifier, namely a core analog circuit relevant to a wealth of signal conditioning and sensing applications (e.g., smart sensor systems). The circuit functions down to a power supply voltage of 5V, much lower than state-of-the-art implementations of similar circuits, and achieves superior performance in a number of fundamental metrics. Therefore, our study on low-voltage operation in polymer-semiconductor transistors paves the way for high-performance battery-powered large-area electronics.
1 A. Luzio, F. G. Ferré, F. Di Fonzo and M. Caironi, Adv. Funct. Mater., 2014, 24, 1790–1798.
2 Y. M. Park, J. Daniel, M. Heeney and A. Salleo, Adv. Mater., 2011, 23, 971–4.
3 J. Li, Z. Sun and F. Yan, Adv. Mater., 2012, 24, 88–93.
4 D. Venkateshvaran, M. Nikolka, A. Sadhanala, V. Lemaur, M. Zelazny, M. Kepa, M. Hurhangee, A. J. Kronemeijer, V. Pecunia, I. Nasrallah, I. Romanov, K. Broch, I. McCulloch, D. Emin, Y. Olivier, J. Cornil, D. Beljonne and H. Sirringhaus, Nature, 2014, 515, 384–388.
11:00 AM - *EM6.1.05
High-Mobility Amorphous Oxide Transistors by Spatial Atomic Layer Deposition of InZnO
Gerwin Gelinck 1 2 , Ilias Katsouras 1 , Andrea Illiberi 1 , Joris Maas 1 , Paul Poodt 1
1 Holst Centre Eindhoven Netherlands, 2 Department of Applied Physics TU Eindhoven Eindhoven NetherlandsShow Abstract
In the last decade there has been considerable development in the area of amorphous oxide semiconductors (AOS) such as InGaZnO, owing to their superior electrical properties as compared to a- Si:H, and lower cost and better uniformity over large areas as compared to poly-Si.1,2 Today’s technique of choice for depositing these materials in industry has been sputtering from an oxide target. While sputtering is a useful and versatile deposition technique, it requires expensive vacuum equipment. Furthermore, it turns out to be difficult to achieve the right material composition and thickness over large areas, leading to variation in transistor performance particularly for thin films. In this work, we present spatial atomic layer deposition (S-ALD) as an alternative method to deposit these materials in an industrially scalable process at atmospheric pressure.3
S-ALD combines the advantages of temporal ALD (superior control of layer thickness and composition, large-scale uniformity and unparalleled conformability inherent to self-limited layer-by-layer growth) with high deposition rates, eliminating the need for vacuum processing. By pre-mixing vapors of metal precursors with either water vapor or oxygen plasma jet as the oxygen source, we can accurately control the film composition. Diethylzinc, trimethylindium, and triethylgallium are used as Zn, In, and Ga precursors, respectively. Amorphous InZnO thin-film transistors show a high mobility of 30 cm2/Vs, low-off current, a switch-on voltage of ~0V and excellent bias stress stability. These characteristics are preserved when scaling down the thickness of the semiconductor to less than 5 nm, opening the way to engineer novel semiconductor structures, such as superlattices,4 with even higher electron mobilities, and ultra-flexible electronics.
1. K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M Hirano and H. Hosono, Nature 432, 488 (2004)
2. T. Kamiya and H. Hosono, NPG Asia Mater. 2, 15 (2010)
3. A. Illiberi, B. Cobb, A. Sharma, T. Grehl, H. Brongersma, F. Roozeboom, G. Gelinck and P. Poodt, App. Mat. Interfaces 5 (24), 13124 (2013)
4. Yen-Hung Lin, Hendrik Faber, John G. Labram, Emmanuel Stratakis Labrini Sygellou, Emmanuel Kymakis, Nikolaos A. Hastas, Ruipeng Li, Kui Zhao, Aram Amassian, Neil D. Treat, Martyn McLachlan, and Thomas D. Anthopoulos, High Electron Mobility Thin-Film Transistors Based on Solution-Processed Semiconducting Metal Oxide Heterojunctions and Quasi-Superlattices, Adv. Science, 2, 1500058 (2015)
11:30 AM - *EM6.1.06
Vertical Organic Field-Effect Transistor for AMOLED Driving
Hans Kleemann 1 , Gregor Schwartz 2 , Mauro Furno 2
1 University of California, Berkeley Berkeley United States, 2 Novaled GmbH Dresden GermanyShow Abstract
Organic thin-film transistors (OTFT) are attracting great interest in view of flexible electronics enabling future revolutionizing applications such as flexible displays or wearable electronics. However, for (applications such as) active matrix OLED display driving, the TFT performance regarding transconductance is still (too) low. Even if new organic semiconductors with improved charge carrier mobility are continuously being developed, there is a need for a new TFT design paradigm to further boost the performance of organic transistors.
Here, we present a vertical organic transistor (V-OFET) concept with superior current driving capabilities compared to state-of-the-art horizontal organic TFTs. Within this 3-dimensional V-OFET geometry, the channel length is not defined by the applied patterning technique, but rather by the thickness of the organic layers separating the vertically stacked source and drain electrodes, typically <300nm. This ultra-short channel configuration allows for superior current driving, however, it is usually accompanied by undesired short-channel effects such as a loss of saturation and an increased off-current level.
After introducing the V-OFET concept we discuss how such a device can be fabricated within an industrial process environment as it is used for display backplane fabrication. In particular, we show how surface engineering can be applied in order to effectively suppress short channel effects. In this way, an excellent transistor performance with a very high transconductance (>0.2µS/µm), high cut-off frequency (10MHz), excellent on/off ratio (107), and good operational stability can be achieved.
In the second part of the contribution, we focus on the potential of V-OFETs for active matrix OLED (AMOLED) display driving. By comparing typical TFT design guidelines for vertical and horizontal TFTs we obtain that the V-OFET design leads to a considerable reduction of the area consumption within a pixel which allows either for a higher display resolution, more complex compensation schemes, or a lower power consumption. Due to their favorable layout and their superior transconductance, V-OFETs can be used for AMOLED driving up to a 4k resolution.
12:00 PM - EM6.1.07
High Carrier Mobility (~320 cm2/Vs) of Sn-Doped Poly-Ge on Insulator by Low-Temperature Solid-Phase Crystallization
Taizoh Sadoh 1 , Yuki Kai 1 , Kenta Moto 1 , Ryo Matsumura 1 , Masanobu Miyao 1
1 Kyushu University Fukuoka JapanShow Abstract
Low-temperature (≤500°C) formation of semiconductor-on-insulator with high carrier mobility is desired to realize advanced thin-film transistors for 3-D LSI and system-in-display. Recently, solid-phase crystallization (SPC) of Ge, SiGe, and GeSn on insulator has been intensively investigated. These efforts achieved mobility of 130−140 cm2/Vs,[1,2] exceeding that of poly-Si. To improve the mobility, in the present study, we comprehensively investigate SPC of amorphous GeSn layers on insulator.
In the experiment, amorphous GeSn films with wide ranges of Sn concentration (0−20%) and film thickness (30−500 nm) were deposited on quartz substrates. The samples were annealed (380−500oC) to induce crystallization.
Firstly, Sn-concentration dependence of mobility for samples (Sn concentration: 0−20%, film thickness: 100 nm) annealed at 450oC was investigated. With increasing Sn concentration from 0% to 2%, mobility increased; however, it decreased for Sn concentration exceeding 2%. Electron backscattering diffraction (EBSD) measurements indicated that grain size became the maximum for Sn concentration of 2%. It is noted that the optimum Sn concentration (2%) for the maximum mobility is almost equal to solubility of Sn in Ge.
For samples (Sn concentration: 2%) annealed at 450oC, effects of film-thickness on mobility and grain size were investigated. For thickness ≤120 nm, grain size was almost constant. In addition, mobility increased with increasing thickness. This phenomenon is due to high concentration acceptors (~5×1017 cm−3) near substrates, which was revealed by in-depth analysis using successive Hall measurements combined with layer-by-layer etching. On the other hand, for thickness ≥120 nm, mobility showed the highest value (280 cm2/Vs) for 200-nm thickness, and then both mobility and grain size decreased with increasing thickness. These results indicate that mobility is degraded by grain-boundary scattering due to decreased grain size for thickness ≥200 nm, which is attributed to increased bulk nucleation.
To suppress bulk nucleation in samples (Sn concentration: 2%, thickness: 200 nm), effects of annealing temperature were examined. EBSD measurements revealed that with decreasing annealing temperature, grain sizes increased from ~2 (450°C) to ~4 μm (380°C). As a result, very high mobility of 320 cm2/Vs, which is about 2.5 times as high as reports of Ge and GeSn grown at low-temperature (≤500°C), is achieved at 380°C.
In summary, by controlling film-thickness (200 nm), Sn-concentration (2%), and annealing temperature (380°C), Sn-doped poly-Ge with high mobility (~320 cm2/Vs) is obtained on insulator. This high value of mobility is the top data of semiconductor films grown at low temperatures (≤500°). This SPC technique will facilitate realization of high-performance thin-film transistors for next-generation electronics.
 K. Toko, et al., Solid-State Electronics 53, 1159 (2009).
 W. Takeuchi, et al., Appl. Phys. Lett. 107, 022103 (2015).
12:15 PM - EM6.1.08
Transfer-Printed Flexible Thin-Film Transistors Using Copolymer-Based Polymeric Ion Gels
Hyun Je Kim 1 , Yeong Kwan Kwon 1 , Hae Min Yang 1 , Dong Hui Lee 1 , Kihyon Hong 2 , Keun Hyung Lee 1
1 Inha University Incheon Korea (the Republic of), 2 Korea Institute of Materials Science(KIMS) Changwon Korea (the Republic of)Show Abstract
Ionic liquids have received considerable attention in electrochemical device applications due to their outstanding properties including high thermal and electrochemical stability, large ionic conductivity and specific capacitance. To solidify ionic liquid and prepare gel-type thin films, structuring polymers have been blended with ionic liquid. The resulting solid polymer electrolytes, also known as ion gels, have been employed as high capacitance gate dielectrics in thin film transistors and their circuit applications. To deposit ion gels, various solution processing techniques such as solvent casting, spin coating, lamination, screening printing and aerosol jet printing have been successfully demonstrated. Soft-lithographic transfer printing that has been widely used to make thin layers of self-assembled monolayer, organic molecules, polymers, nanoparticles was applied in block polymer based ion gels. More specifically, physically crosslinked ion gels based on poly(styrene-b-ethylene oxide-b-styrene) triblock polymer and 1-ethyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide were used. In this presentation, another type of physically crosslinked ion gel using random copolymer poly(vinylidene fluoride-co-hexafluoropropylene) and an ionic liquid was fabricated by using transfer printing for the first time on various substrates such as stainless steel, glass, polyimide, PET, paper, and Al foil with different sizes up to 1 in2. With these transfer-printed random copolymer ion gels as high capacitance gate dielectrics, thin-film transistors were successfully fabricated on flexible plastic substrates. These transistors operated at low voltages (< 1 V) with reasonably high hole mobility (> 1 cm2/Vs) and on/off current ratio (~105). The Flexible transistors on polyimide exhibited moderate performance degradation ~20 % after 10,000 bending cycles because of the outstanding mechanical strength of the ion gels. Statistical investigations on hole mobility, on/off ratio and turn on voltage suggested excellent reliability of the transfer printing to fabricate random copolymer based ion gels transistors. Therefore, these results demonstrate an attractive deposition technique to employ high capacitance copolymer ion gels on flexible thin film transistors.
12:30 PM - *EM6.1.09
Amorphous Oxide Semiconductor Transistors in Thin-Film IC Applications
Paul Heremans 1
1 Imec Leuven BelgiumShow Abstract
Amorphous oxide TFTs are amenable to direct processing on plastic substrates. They possess several characteristics that make them attractive for complex circuit integration. Whereas the typical charge carrier mobility is about 15 cm2/Vs, it is known that significantly higher mobilities can be reached when thin highly doped transport layers are used. We show the use of spatial ALD to reach reproducible mobility of 30 cm2/Vs. Ab-initio calculations reveal more insights into the material system, which can lead to further improvements. Furthermore, unlike amorphous silicon or organic transistors, amorphous oxides are compatible with self-aligned transistor configuration exhibiting high fT. Finally, they have record-low off-state current, which can be used in circuit design to lower the power consumption. We will relate these different properties to their role in applications, in particular OLED backplanes, integrated gate drivers, and thin-film ICs.
So far, only n-type amorphous oxide semiconductors have been found. Some p-type oxide semiconductors have been shown, but they have lower mobility, are crystalline, and have reverse leakage due to an ambipolar character. We will give insights in the future possibilities regarding oxide as well as organic p-type semiconductors suitable to complement high-performance n-type amorphous oxides.
EM6.2: Oxide TFTs
Monday PM, November 28, 2016
Hynes, Level 3, Room 312
2:30 PM - *EM6.2.01
PEALD ZnO TFTs on Thin Flexible Substrates
Thomas Jackson 1
1 Department of Electrical Engineering The Pennsylvania State University University Park United StatesShow Abstract
Oxide semiconductor thin film transistors (TFTs) offer significant performance improvement compared to hydrogenated amorphous silicon (a-Si:H) devices, including >10x higher field effect mobility. Most current oxide semiconductor TFT manufacturing processes use indium gallium zinc oxide (IGZO) deposited by sputtering onto glass substrates. However, this deposition technique, and typically associated post-deposition annealing, present challenges for polymeric substrates. For substrates with imperfections, layer-by-layer deposition processes like plasma enhanced atomic layer deposition (PEALD) can provide improved defect coverage and device yield.
We have used low-temperature PEALD to fabricate ZnO TFTs on few micron thick solution-cast polyimide substrates. The devices use a bottom gate structure with Al2O3 gate dielectric and thin (~10 nm thick) ZnO channels, both deposited by PEALD at 200 °C. Solution cast polyimide substrates provide smooth films (few nm rms roughness) and excellent in-plane dimensional stability (ppm range) during processing on carrier substrates. PEALD ZnO TFTs fabricated on thin polyimide substrates have characteristics very similar to devices fabricated on glass, with linear region field effect mobility >10 cm2/V×s at a gate electric field of 2 MV/cm, and ion/ioff >108. Al2O3 passivated devices have excellent stability, and double-gate and tri-layer TFTs provide additional design flexibility. PEALD ZnO TFTs fabricated on thin polyimide survive tens of thousands of cycles of flexing or movement over few mm diameter rollers [1,2]. PEALD ZnO TFTs are interesting core devices for flexible electronic applications.
1. H. U. Li and T. N. Jackson, “Oxide Semiconductor Thin Film Transistors on Thin Solution-Cast Flexible Substrates,” IEEE Electron Device Letters, 33, pp. 35-37 (2015).
2. H. U. Li and T. N. Jackson, “Flexibility Testing Strategies and Apparatus for Flexible Electronics,” IEEE Transactions on Electron Devices, 63, pp. 1934-9 (2016).
3:00 PM - EM6.2.02
Enhanced Zinc Tin Oxide TFT Bias Stress Stability by Yttrium Incorporation
Wenbing Hu 1 , Rebecca Peterson 1
1 Electrical Engineering and Computer Science Department University of Michigan Ann Arbor United StatesShow Abstract
Zinc tin oxide (ZTO) is an inexpensive indium-free amorphous oxide semiconductor (AOS) with a wide optical band gap (> 3 eV) and an electron mobility of up to 32 cm2V-1s-1 . AOS thin film transistors (TFTs) typically exhibit changes in electrical performance following positive bias stress (PBS) and negative bias illumination stress (NBIS). The dominant origins of AOS instabilities are believed to be interactions between the back channel and ambient, charge injection and trapping in the gate insulator, and creation of semiconductor charge states such as under-coordinated oxygen, metal-metal or metal-oxygen mis-coordination, or oxygen vacancies [2,3]. The first two processes can be minimized by using back channel passivation and high quality gate insulators. To control bulk charge states, AOS can be alloyed with elements that strongly bond to oxygen. Yttrium is an excellent candidate because Y2O3 has a large Gibbs free energy and is inexpensive .
Here we studied PBS and NBIS in solution-processed bottom gate top contact ZTO and Y-doped ZTO TFTs. In un-passivated TFTs, PBS causes large positive voltage shifts in the TFT transfer curves. Backchannel passivation with 40-nm ALD Al2O3 virtually eliminates PBS instability, indicating that its main origin is back channel chemical absorption/desorption. NBIS on un-passivated ZTO TFTs induces large negative shifts in threshold voltage that cannot be fully remedied by back channel passivation. By comparison of experimental results with 2-D numerical device simulations (Silvaco), the main origin of NBIS instability in unpassivated ZTO TFTs was identified to be accumulation of positive trapped charges at the semiconductor-gate insulator interface, whereas the major cause of NBIS instability in passivated ZTO TFTs may be creation of shallow donor states (0.1 to 0.3eV below Ec) either in the bulk or at the semiconductor-passivation layer interface. Our experiments show that creation of shallow states during NBIS was significantly slowed by incorporation of yttrium in ZTO. Since shallow states in AOS are commonly attributed to positively ionized oxygen vacancies, we conclude that yttrium improves NBIS stability by gettering oxygen to reduce oxygen vacancy-related defects. However, incorporation of yttrium at concentrations above 3at% begins to compromise TFT DC performance possibly via creation of deep acceptor states due to alloy disorder or formation of nanometer-scale insulating regions. Due to the multiple roles of Y in ZTO, careful film composition selection is required for optimal Y:ZTO TFT performance.
 J.-I. Kim, et al., Appl. Phys. Lett., vol. 99, no. 12, p. 122102, Sep. 2011.  J. F. Wager, et al., Curr. Opin. Solid State Mater. Sci., vol. 18, no. 2, pp. 53, Apr. 2014.  S. Sallis, et al., Appl Phys Lett, vol. 104, p. 232108, 2014.  W. M. Haynes, CRC Handbook of Chemistry and Physics, 95th Edition. CRC Press, 2014.
3:15 PM - EM6.2.03
In-Ga-Zn-O MESFETs with Transparent Nanocrystalline Ru-Si-O Gate on Flexible Polymer Substrates
Jakub Kaczmarski 1 , Andrzej Taube 1 , Michal Borysiewicz 1 , Torben Boll 2 , Krzysztof Piskorski 1 , Marek Wzorek 1 , Krystyna Stiller 2 , Eliana Kaminska 1
1 Institute of Electron Technology Warsaw Poland, 2 Chalmers University of Technology Gothenburg SwedenShow Abstract
One of the main issues that need to be addressed in amorphous In-Ga-Zn-O (IGZO) technology is the fabrication of reliable metal–semiconductor field-effect transistors (MESFETs) desired for low-power flexible electronics applications. Previous works on IGZO MESFETs reported devices fabricated only on rigid substrates, since fabrication of reliable Schottky contacts to oxide semiconductors acting as a transistors gate electrodes often requires annealing treatment. Targeting transparent and flexible electronics applications, in the following study we propose fabrication of a-IGZO MESFETs with such transparent conductive oxides as Ru-Si-O and In-Sn-O, acting as Schottky gate electrode and ohmic source/drain contacts, respectively. The electrode materials were chosen to mitigate interfacial reactions with the IGZO channel, which deteriorate the Schottky barrier properties. This allows to avoid the standard post-deposition annealing step, enabling MESFET fabrication on flexible PET and paper substrates.
The chemical composition of the Ru-Si-O Schottky metallization was optimized in order to achieve simultaneously a high oxygen content, low resistivity and high optical transmission. According to X-ray diffraction, all deposited films are amorphous. However, high resolution transmission electron microscopy revealed randomly oriented nanocrystalline inclusions embedded in an amorphous matrix. With the increase in %O2 one can observe an expansion of the amorphous matrix. The density recorded for the sample deposited without oxygen is 7.3 g/cm3 and the final density is 2.42 g/cm3, close to the density of amorphous SiO2 (2.19 g/cm3). Atom probe tomography studies enabled to identify nanoparticle as pure ruthenium with a Ru-O shell and the amorphous matrix as SiO2. Values of work function extracted from internal photoemission spectroscopy changed from 5.65 to 5.85 eV for 0% and 30% O2, respectively.
The understanding of Ru-Si-O process-property relationship allowed us to introduce Ru-Si-O/a-IGZO Schottky barrier as a gate electrode of MESFET transistors. Fabricated contacts exhibit rectification ratio exceeds 3×105. Schottky barrier heights and ideality factors (n), evaluated by fitting exact solutions of the Schottky diode equation based on the thermionic emission model to experimental I-V curves equal ΦB = 0.91 eV and n = 1.59 respectively.
MESFETs fabricated on flexible PET and paper substrates present field-effect mobility exceeding 9 cm2/Vs, on-to-off current ratio above 105, and subthreshold swing as low as 210 mV/dec. 3D-printed elements were used to bent PET foil with MESFET structures into a curve with radius in the range of 50 – 5 mm causing tensile mechanical stress. Within the bending radii from 50 to 30 mm the fabricated devices are almost unaffected by mechanical stress, although slight decrease is observed in saturation current. For lower bending radii channel mobility, threshold voltage and subthreshold swing drop of about 10%.
3:30 PM - *EM6.2.04
Back-Channel Manipulation for ZnO-Based Thin-Film Circuits
Shelby Nelson 1 , Carolyn Ellinger 1
1 Kodak Research Laboratories Eastman Kodak Company Rochester United StatesShow Abstract
Metal-oxide thin-film transistors (TFTs) with zinc oxide (ZnO) as the semiconductor can have mobility above 20 cm2/V-s, on-off ratios greater than 108, and show good bias stability. However, the back channel of such transistors must be properly treated to achieve the best results. Early studies showed that aluminum oxide layers deposited on the back-channel in bottom-gate (inverted) TFTs improved the stability enormously, although often at the cost of a negatively shifted turn-on voltage.*
In this talk we will discuss the effect of different treatments of the back-channel of ZnO TFTs fabricated by spatial atomic layer deposition (SALD). In our definition, the “back-channel” is the surface of the ZnO semiconductor that is furthest from the gate contact. Thus it can refer not only to the top surface of the semiconductor in a bottom-gate geometry, but also to the interface between the substrate and the semiconductor when a top-gate geometry is employed. Empirically, when the ZnO back-channel is in contact with an organic material such as a polymer, the turn-on and threshold voltage are above zero; in contrast, when the back-channel is in contact with an inorganic material, such as a glass substrate or an aluminum oxide layer, the turn-on voltage is negative. This electrical response provides an additional knob for designing enhancement and depletion mode TFTs and circuits. Thus a mixture of top- and bottom-gate devices can be used to provide the depletion-mode load and enhancement-mode drive TFTs for an inverter, or alternatively, all bottom-gate devices can be differentiated into enhancement- and depletion-mode by choice of material for the first passivation layer. We will illustrate results from the application of these techniques to both planar and vertical TFTs.
*D. A. Mourey, Mitchell S. Burberry, D. A. Zhao , Y. V. Li, S. F. Nelson, L. Tutt, T. D. Pawlik, D. H. Levy, T. N. Jackson, Journal of the SID 18/10, 2010.
4:30 PM - *EM6.2.05
Low-Temperature Fabrication of Aqueous Solution-Processed Oxide Thin-Film Transistor Backplane
Mitsuru Nakata 1 , Nobuko Fukuda 2 , Shintaro Ogura 2 , Hiroshi Tsuji 1 , Masashi Miyakawa 1 , Yoshihide Fujisaki 1 , Toshihiro Yamamoto 1
1 NHK Science amp; Technology Research Laboratories Tokyo Japan, 2 National Institute of Advanced Industrial Science and Technology Tsukuba JapanShow Abstract
Thin-film transistors (TFTs) based on oxide semiconductors are promising candidates for use in flexible organic light-emitting diode (OLED) displays on plastic substrates, because they can provide the high mobility necessary to drive OLED devices and they can be fabricated at temperatures of less than 300 °C. Generally, oxide semiconductor films are deposited by sputtering in a vacuum chamber. Recently, however, solution processes that do not require vacuum equipment have been extensively studied, with the goal of realizing a simple low-cost fabrication method. One problem with general solution processes is that a baking temperature of more than 400 °C is usually required in order to achieve high mobility, because it is necessary to reduce the amount of impurities in the semiconductor film. In contrast, the use of aqueous solutions can allow solvent evaporation and oxide formation at low temperatures, leading to the possibility of fabricating high-performance TFTs . In the present study, bottom-gate TFTs using aqueous solution-processed InGaZnO (IGZO) films baked at a temperature of 300 °C were fabricated, and the effects of thermal annealing following the formation of the source and drain electrodes on the IGZO film and the adaptability of the backplane process for OLED displays were investigated. It was found that thermal annealing at a temperature of 300 °C led to an increase in the field-effect mobility from 0.7 to 2.1 cm2/Vs, and suppression of the hysteresis in the transfer characteristics. Next, we fabricated a 5-inch OLED display using these TFTs at temperatures of less than 300 °C and confirmed that moving images were successfully displayed on the screen. It was found that the aqueous solution-processed IGZO-TFTs are applicable to the low-temperature backplane process. Furthermore, a solution-processed organic gate insulator was applied to aqueous solution-processed IGZO-TFTs that had a top-gate structure in order to simplify the fabrication process and improve the flexibility. Switching behavior was observed for these TFTs, but the mobility was lower than that for the bottom-gate structure. A compositional analysis along the film thickness direction using Rutherford backscattering spectrometry showed that the In content at the top of the IGZO film was lower than that at the bottom. This may be the principal reason why the mobility is lower for top-gate structures than for bottom-gate structures. To improve the mobility, it is therefore necessary to optimize the composition of the IGZO film.
 K. H. Lee et al., ACS Appl. Mater. Interf. 5 (2013) 2585.
5:00 PM - EM6.2.06
High Performance Solution-Processed Oxide Thin-Film Transistors for Large Area Elctronics
Christophe Avis 1 , Jin Jang 1
1 Information Display Kyung Hee University Seoul Korea (the Republic of)Show Abstract
We have developed solution processed oxide thin film transistors for large area electronics.
We designed and processed high-k dielectrics (Y2O3, ZrOx, AlOx, ZAO...) and oxide semiconductors (IZTO, IGO...).
We have reached field-effect mobilities exceeding 100cm2/Vs.
By careful choice metal ratios in the oxide semiconductor, process condition and device optimization, we can obtain highly reliable and stable TFT swith variation of Vth of less than 0.1V within 1hour of temperature gate bias stress.
5:15 PM - EM6.2.07
High Quality Solution-Processed HfOx Gate Insulator by Thermally Purified Solution Process
Jusung Chung 1 , Young Jun Tak 1 , Won-Gi Kim 1 , Heesoo Lee 1 , Hyun Jae Kim 1
1 School of Electrical and Electronic Engineering Yonsei University Seoul Korea (the Republic of)Show Abstract
Solution-processed oxide thin film transistor (TFT) has remarkably received attention for low fabrication cost and simple fabrication process. However, it has inferior electrical performances compared to vacuum processed oxide TFT. In order to enhance electrical performances of solution-processed oxide TFT, many researchers have investigated various engineering such as materials, structure, and post treatment. In particular, for material engineering, solution- processed high-k gate insulator has recently been researched to solve aforementioned issue. However, conventional solution-processed high-k gate insulator needs high temperature annealing process to obtain satisfactory electrical performance so it has a limitation for applying various flexible substrates that have low glass transition temperature. In this paper, we propose a simple method for reduction of fabrication temperature for HfOx gate insulator with thermally purified solution (TPS). Fabrication method of TPS is that we thermally process HfOx solution around boiling temperature of solution on hot plate just ‘before’ film deposition. High temperature can evaporate residual gas and other components in solution which can form defect sites so that essential energy to reduce defect can be reduced. Thus, TPS process successfully decreased film formation temperature of solution-processed HfOx gate insulator from 350oC to 200oC. In addition, TPS has improved surface energy by low surface tension and contact angle resulting high film attachment with substrate. Thus, TPS processed HfOx gate insulator has better electrical characteristics such as breakdown electric field (from 4.16 MV/cm to 6.23 MV/cm) and leakage current density (from 10-7 A/cm2 to 10-9 A/cm2) compared to those of conventional solution-processed HfOx gate insulator. After depositing sputtered In-Ga-Zn-O film and evaporated Al electrodes, TPS processed TFT exhibits higher mobility (35.76 cm2/Vs) and on/off current ratio (1.19 x 104) than those of conventional TFT. Consequently, TPS processed HfOx film plays superior role of gate insulator so that the TFT can have improved electrical characteristics at low temperature.
5:30 PM - EM6.2.08
Aqueous-Processed Metal Oxide Conductors for High-Performance, Low Temperature, Printed Transistors
William Scheideler 1 , Rajan Kumar 1 , Andre Zeumault 1 , Vivek Subramanian 1
1 University of California, Berkeley Berkeley United StatesShow Abstract
Inorganic metal oxides are competitive materials for pixel drivers in next generation displays, offering high-performance and good transparency. Solution-processing of metal oxides can allow efficient material use and scalable large area processing. However, the organic solvents predominantly used in metal oxide inks add cost and complexity to roll-to-roll manufacturing since environmental regulations require solvent capture and organics necessitate high-temperatures to decompose carbonaceous species. This work addresses these challenges by developing aqueous, carbon-free inks for fabricating transparent metal oxide thin film transistors (TFTs) at low temperatures. These inks’ fluid properties are optimal for inkjet printing transparent conductive electrodes and semiconductors with low line-edge roughness, high-uniformity, and no coffee-ring.
Highly conductive (ρ < 10 mΩ cm) transparent electrodes based on aluminum-doped cadmium oxide (ACO) present a new material for printed inorganic electronics. The optical and electrical properties of these conductors, as well as their crystallinity and microstructure, were investigated as a function of the low temperature annealing (220 °C – 300 °C) conditions and aluminum doping concentration. To demonstrate their suitability for high-performance transparent electronics, TFTs with ACO source / drain electrodes and InOx semiconductors were prepared exclusively from aqueous solutions of metal nitrates (Al(NO3)3, In(NO3)3, Cd(NO3)2) at ≤ 250 °C. Competitive device performance was achieved with a champion mobility of µlin = 19 cm2/Vs and average performance of µlin = 11.0 ± 4 cm2/Vs, SS = 200-300 mV/dec, and Ion / Ioff > 107. This work represents the first demonstration of printed aqueous metal oxide conductors and semiconductors, a step towards realizing transparent, printed electronics that do not depend on vacuum-deposited electrodes.
5:45 PM - EM6.2.09
Direct Demonstration of Gallium Nitride Thin-Film Transistors on Flexible Substrates
Sami Bolat 1 , Zulkarneyn Sisman 1 , Seda Kizir 1 , Ali Haider 1 , Necmi Biyikli 1 , Ali Kemal Okyay 1
1 Bilkent University Ankara TurkeyShow Abstract
GaN is a widely used semiconductor, finding its commercial applications in several areas including, high power electronics, optoelectronics, and microwave electronics. Despite having excellent electrical and optical properties, the use of this material is limited to conventional rigid substrates, mainly due to the high deposition temperature of the GaN epi-layers. In order to introduce this material into the low temperature applications, several methods are employed. Among the applied methods, atomic layer deposition has offered the most promising results with our demonstration of the TFTs with GaN channels fabricated with a thermal budget lower than 250°C, the lowest processing temperature level for the nitride based electronic devices. Up to now, the nitride based electronic and optoelectronic devices have been realized on flexible substrates only via transferring method, which carries the potential risk of decreasing the yield of the devices, which therefore prevents the commercialization of the proposed devices. In this study, we demonstrate bottom gated TFTs with GaN channel layers directly built on flexible polyethylene naphthalate (PEN) substrates, for the first time. Thermal budget of the device processing steps is below 200°C, which breaks our previous lowest thermal budget record.
Flexible TFT fabrication starts with the solvent based cleaning of the PEN substrates. 100 nm thick Al thin film is deposited via thermal evaporation at room temperature, and this layer serves as the gate of the TFTs. 200nm thick SiO2 thin films are deposited with e-beam evaporation and patterned via lift-off technique. This is followed by the growth of 77-nm-thick Al2O3 and 11-nm-thick GaN subsequently deposited at a single ALD process, at 200 °C. Active device areas are isolated by BCl3-based dry etching of the GaN layer. Source and drain contacts are formed by e-beam evaporation of the metal stack consisting of Ti/Au (30/150 nm).
Output electrical characteristics of the ALD-based GaN TFTs on flexible substrates show that fabricated devices have clear pinch-off and saturation characteristics, and they exhibit n-type field effect transistor behavior. Transfer characteristics of the devices reveal the ION/IOFF ratios as high as 2x103. The threshold voltage of the device is extracted from the transfer characteristics and it is found to be 2.5 V. Charge mobility in the channel is extracted in the linear region of the device operation and calculated to be 0.025 cm2/V-sec. This particularly low mobility can be attributed to the nanocrystalline structure of GaN thin films, and the surface states at the semiconductor insulator interface. Finally the effect of the positive gate bias stress on threshold voltage of the devices is studied and devices are shown to be extremely stable. This study is believed to pave the way for the nitride based stable and fully transparent flexible electronics upon further materials and process optimization.
EM6.3: Poster Session I
Monday PM, November 28, 2016
Hynes, Level 1, Hall B
9:00 PM - EM6.3.01
Transparent Flexible Oxide Thin-Film Transistor via Inorganic-Based Laser Lift-Off
Han Eol Lee 1 , Seung Hyun Lee 1 , Daniel Joe 1 , Tae Hong Im 1 , Keon Jae Lee 1
1 KAIST Daejeon Korea (the Republic of)Show Abstract
The ultrathin flexible active-matrix organic light-emitting diode (uf-AMOLED) technology is in the limelight because it has higher refresh rates, faster response time, and lower power consumption than passive-matrix. Thin film transistor (TFT) backplane technology is essential to the fabrication of AMOLED displays. In TFT backplane technology, above all, oxide TFTs is vital switching and driving component, due to its high mobility, low leakage current, high speed, and current-density. In this paper, we report an ultrathin, flexible, transparent, and high performance oxide TFT array via inorganic based laser lift-off (ILLO) process on PET substrate of 4 μm thickness. The flexible oxide TFT array on ultrathin PET substrate enabled to attach anywhere, successfully operated with outstanding electrical performance, and showed the reliable operation of NMOS inverter circuit.
9:00 PM - EM6.3.02
High Stable ZITO/ ZITO:AlZr TFT for Flexible Displays
Yun-Been Na 1 , Jeong-Jin Park 1 , Chan-Hwa Hong 1 , Chang-Ho Lee 1 , Woo-Seok Cheong 1
1 Electronics and Telecommunications Research Institute Dajeon Korea (the Republic of)Show Abstract
In recent year, amorphous oxide thin film transistors(TFTs) have attracted interest of applications for flexible organic light emitting diodes(OLEDs). For reasonable oxide TFTs, the requirements such as high mobility and good stability at low temperatures should be satisfied. In this study, we chose double channel layers to solve the issues of oxide TFTs at low temperature and we successfully fabricated top gate ZITO/ ZITO:AlZr TFTs. After low-temperature annealing process at 250°C, Vth of -0.75V, SS of 0.16V/decade and mobility(uFE) of 18.8 cm2/V s were achieved. At the PBTS(positive bias temperature stress) test, the oxide-TFT exhibited △Vth of 0.42V at 40°C for 1hour.
9:00 PM - EM6.3.03
Dual-Gate Dual-Body Organic Microelectromechanical Relay
Yanbiao Pan 1 , Jaeseok Jeon 1
1 Rutgers University Piscataway United StatesShow Abstract
Much research to date has been devoted to synthesizing new polymers or improving existing polymers in order to overcome the performance limits of the conventional organic thin-film transistor (OTFT): (1) a rather low channel mobility (< 20 cm2V-1s-1) requires a supply voltage well above 2 V for an on-/off-current ratio of > 105; (2) the formation of a relatively poor-quality interface between the polymeric channel and the gate insulator would induce a large off-state leakage current well above 10-13 A; (3) asymmetric pairs of n- and p-type OTFTs result in noncomplementary switching. All these would affect the overall power consumption at the transistor and circuit levels and hence at the system level. In this meeting, we propose and demonstrate a polymer-based electrostatically-actuated microelectromechanical (MEM) relay comprising multiple input and output electrodes, namely, double gates, double bodies, and double pairs of source/drain, in order to enable efficient implementation of large-area portable and/or wearable electronics for the internet of things requiring ultralow-power operation, structural flexibility, visual transparency, low-cost, and low-temperature processing. Firstly, we show that fabricated devices exhibit typical relay I-V characteristics including zero off-state leakage current, steep transitions to the on-/off-state with an input swing less than 60 mV for a decade change in the output current (Ids), and a relatively high on/off current ratio of > 108, and that they can endure a finite number of hot- and cold-switching cycles. Secondly, we examine the effect of similar and dissimilar contact materials on the surface adhesion force (and hence hysteresis voltage) and the on-state current. Thirdly, we explore the dependence of the threshold pull-in voltage (Vpi) on input voltage combinations, and demonstrate basic two-input logic gates: AND, OR, and XOR and a four-input carry generation: (A XOR B) AND (C XOR D) via adjusting the biases applied to a single dual-gate dual-body relay.
9:00 PM - EM6.3.04
Transparent Visible-Light Phototransistors Based on Oxide Semiconductors and Quantum-Dots
Sang Moo Lee 1 , Seung Won Shin 1 , Kwang-Ho Lee 2 , Jin-Seong Park 2 , Yeonjin Yi 3 , Seong Jun Kang 1
1 Kyung Hee University Yongin-si Korea (the Republic of), 2 Hanyang University Seoul Korea (the Republic of), 3 Yonsei University Seoul Korea (the Republic of)Show Abstract
Oxide semiconductors are considered as a good alternative to silicon for a transparent electronics, due to its high field-effect mobility and on/off ratio. Recently, there are many attempts to develop transparent phototransistors using oxide semiconductors. However, the photocurrent of oxide semiconductors can be observed only when the device is exposed to a high-energy photon, such as a ultra-violet light, because oxide semiconductor has a wide band gap. Therefore, we decorated small band gap cadmium selenide (CdSe) quantum-dots (QDs) on the oxide semiconductor phototransistors to increase the photocurrent for a low-energy light, i.e., visible light. The oxide phototransistors, decorated with QDs, showed significantly increase in photocurrent when exposed to visible light due to the QDs. Measurements to construct an energy level diagram were made using ultraviolet photoelectron spectroscopy to determine the origin of the photocurrent, and we found that the small band gap of CdSe QDs enables the increase in photocurrent in the oxide semiconductor phototransistors. The device characteristics and origin of the photocurrent will be presented in detail. The result would provide a promising method for developing highly transparent photosensors based on oxide semiconductors and QDs.
9:00 PM - EM6.3.05
Photoemission Spectroscopy Investigations Correlated with DFT Calculations on Metal Organic Frameworks 2D Thin Films for Molecular Electronics
Radwan Elzein 1 , Chun-Min Chang 2 3 , Ma Shengqian 2 , Inna Ponomareva 4 , Rudy Schlaf 1
1 Electrical Engineering University of South Florida Tampa United States, 2 Chemistry University of South Florida Tampa United States, 3 Institute for Cyber-Enabled Research Michigan State University East Lansing United States, 4 Physics University of South Florida Tampa United StatesShow Abstract
We investigated the advanced physical electronic properties and characterizations of 2-dimentional nano film assembly of metal-organic frameworks (MOFs) based on 5,10,15,20-tetrakis(4-carboxyphenyl)porphyrin by self-organization of Cu(NO3)2 secondary building units (SBU) in situ. The main challenges lie in the choice of suitable self-assembly monolayer (SAM) to control the growth of epitaxial layers on a gold surface and the amalgamation of conductive ligands which is suitable for molecular electronic applications.
MOF multilayer thin films were deposited from solution on a gold surface pre-functionalized with 4-mercaptopyridine (MP) via incubation in a glove box, which was connected to an ultra-high vacuum system outfitted with photoelectron spectroscopy (PS). This enabled to determine the full electronic structures via the combination of ultraviolet photoelectron spectroscopy (UPS) and inverse photoemission spectroscopy (IPES), and also evaluated the growth mode of the nano film via X-ray photoemission spectroscopy (XPS) measurements. The UPS and IPES data agreed very well with the density functional theory (DFT) calculations of the density of states (DOS), thus setting paradigms for their implementation in bottom-up and self-assembled nano electronic devices.
9:00 PM - EM6.3.06
Flexible Si Nanowire Field-Effect Transistor with Ion-Gel as a Gate Insulator
Do Hoon Kim 1 , Su Jeong Lee 1 , Sang Hoon Lee 1 , Jae-Min Myoung 1
1 Department of Materials Science and Engineering Yonsei University Seoul Korea (the Republic of)Show Abstract
Recently, the demands for flexible device are growing rapidly in parallel to the expansion of the wearable device market. Two- and three-dimensional conventional inorganic materials are used for the device fabrication, but it is difficult to apply in flexible device because of its rigid property. However, one-dimensional inorganic materials are applicable to the flexible devices because of its flexible nature. It is noteworthy that the flexible device can be fabricated only when all component parts such as substrate, electrode, and gate insulator (GI) have flexibility. The substrate and electrode can have flexibility by using polymer substrate and metal nanowire (NW), respectively, but the GI using high-k inorganic materials has a rigid characteristic. To overcome this problem, we have used one-dimensional Si NWs as the channel material and the flexible ionic liquid as the GI.
In this study, p-type Si NWs were synthesized by using electroless etching method. The Si NWs were transferred on polyimide (PI) substrate by using the Langmuir-Blodgett method for the alignment of nanowires. Thereafter, Au was deposited on aligned Si NWs as source-drain electrodes. The ion gel consisting of polymer finely blended with an ionic liquid was deposited on the exposed Si NWs between Au electrodes, as the flexible GI. Morphology of Si NWs and structure of device were investigated by scanning electron microscope and optical microscope. The electrical properties of the transistor as a function of bending cycle were measured by semiconductor-parameter-analyzer in order to confirm the flexibility of the device. The mobility, on-off ratio, Vth, and S.S were found to be stable even after 10,000 cycles of bending test.
Keywords: P-type Si nanowire, Ion-gel gate insulator, Flexible FET, Electroless etching method, Langmuir-Blodgett alignment.
9:00 PM - EM6.3.07
Indium Oxide/Zinc Oxide Multi-Layered Thin Films by Atomic Layer Deposition Using Oxygen Plasma and Ozone
Jeongmu Lee 1 2 , Hwanjae Lee 1 , Seungyoul Kang 1 , Seong-Deok Ahn 1 2
1 Electronics and Telecommunication Research Institute (ETRI) Daejeon Korea (the Republic of), 2 Korea University of Science and Technology (UST) Daejeon Korea (the Republic of)Show Abstract
ALD has been a key deposition method for oxide semiconductors, due to its high conformal characteristics and controllability of compositions. ALD carries on alternating exposures of precursor vapors, which chemisorb on the substrate surface in a self-limiting manner to deposit films in an atomic layer-by-layer fashion. Therefore, it is easy to control the stoichiometric composition and film thickness. There are several reactants such as, O2 plasma, O3, H2O and H2O2 for the oxide ALD. According to these reactants, film’s quality and growth characteristics can be greatly changed. In this paper, we studied characteristics of O2 plasma reactant and O3 reactant for the comparison.
We adopted indium oxide which is known as excellent transparent conducting oxide (TCO) and zinc oxide which have semi-conductor characteristic for the film analysis and fabrication of TFTs. Up to now, some precursors have been known for indium oxide such as, InCp (Cyclopentadienyl indium), INCA-1 (Bis(trimethy-silyl)-aminodiethyl-Indium) and DADI (Dimethyl-Aminopropyl-Dimethyl-Indium). Among these, DADI has been rarely studied although it have some advantages. For example, it makes good thin films which have reasonable cost, good purity and low contamination. In contrast, InCp is too expensive to fabricate and INCA-1 contains silicon so that it has the possibility of silicon by-product contamination. In this study, we tried to use DADI as a precursor for indium oxide thin film.
Here, we have utilized a multi-layer structure comprising of InOx/ZnOx layers to realize high-performance TFTs. The TFT with InOx/ZnOx multi-layer structure is fabricated by plasma enhanced atomic layer deposition (PEALD) and ozone processed atomic layer deposition with varying the number of InOx and ZnOx cycles. This well controlled multi-layer structures are expected to induce improved electric and optical performance due to its convenience of chemical composition control resulting in high mobility transistors. The obtained characteristics of the InOx/ZnOx multi-layer films were analysed using TEM, XRD, and XPS. Through this work, we accomplished 30.3 cm2/V●s of field effect mobility, 0.14 V/dec of sub-threshold swing and about 85% of transmittance. So, we saw potential possibility about transparent large area display’s back-plane.
1. This research was financially supported by the "Sensitivity touch platform developmnet and new industrialization support program" through the Ministry of Trade, Industry & Energy (MOTIE) and Korea Institute for Advancement of Technology (KIAT)
2. This work was supported by Institute for Information & communications Technology Promotion(IITP) grant funded by the Korea government(MSIP) (B0117-16-1003, Fundamental Technologies of two-dimensional materials and devices for the platform of new-functional smart devices)
9:00 PM - EM6.3.08
Fully Transparent and Printable Thin-Film Transistor Devices Based on Si Nanowires
Gary Zhao 1 , Xiaohua Chen 1 , Wumaier Xializhati 1 , Caiming Sun 1
1 Nano and Advanced Materials Institute Hong Kong University of Science and Technology Hong Kong Hong KongShow Abstract
Recently, 1-D nanostructures, such as semiconductor nanowires (SiNWs), have emerged as interesting materials for the fabrication of high-performance transistors with electronic performance comparable to and in some cases exceeding that of the highest quality single-crystal materials. Preparation of crystalline SiNWs is the use of metal-assisted chemical etching, where solution-nucleated metal plays the important role of a nanoscale electrode in the electrochemical etching of a single-crystalline Si wafer. The metal nanoparticles, such as Ag, oxidize Si that is in contact with them by taking electrons from Si. The oxidized Si, or SiO2, is then etched away by HF in the etching solution, leaving a pit or hole on the Si surface. Finally, Si nanostructures result from areas where no metal is present. This can be done even at room temperature without involving high temperature, low pressure, or costly equipment and hazardous materials, which makes metal-assisted chemical etching simple, easy, and economical. Here, we report on studies of transparent and printable thin-film transistor (TFT) devices based on SiNWs. The NW-based devices exhibit uniform characteristics with average field-effect mobilities exceeding 100 cm2/Vs. The nanowires can be aligned and selectively deposited via spray gun under air pressure as a result of evaporation-induced polar solvent flow. Prototype nanowire-based TFT (NW-TFT) devices on glass substrates showed excellent optical transparency and transistor performance in terms of transconductance, threshold voltage range, and on/off ratio. High on-currents and field-effect mobilities were obtained from the NW-TFT devices even at low nanowire coverage. The SiNWs-based TFT approach offers a number of desirable properties such as low growth temperayure, high electron mobility, and optical transparency and low operation voltage, and may lead to large-scale applications of transparent electronics on diverse substrates.
9:00 PM - EM6.3.09
Inkjet-Printed Zinc-Tin-Oxide TFTs with Solution-Processed Dual Semiconductors
Seung-Hyun Lee 1 , Young-Jin Kwack 1 , Woon-Seop Choi 1
1 Hoseo University Asan-si Korea (the Republic of)Show Abstract
The solution process is a simple and low-cost thin film deposition method that enables a large area coating and high throughput because it can circumvent the need for photolithography and vacuum deposition. Direct patterning can be processed with screen printing, imprinting, ink-jet printing, and electrohydrodynamic-jet printing. Among them, inkjet printing is an attractive technique in device fabrication for the direct pattern writing and precise materials delivery. Recently, spin-coated double-active layer oxide TFTs, in which heterostructured channels, were reported to obtain improved electrical properties at relatively low processing temperatures. However, inkjet printing can provide a patterned active layer structure and give better properties compared to a simple spin-coated one.
To achieve the optimized electrical properties of an inkjet-printed double-active layer, the ZTO TFTs with various compositions of In2O3 solutions were examined. By controlling the annealing temperature and indium content, heterostructured In2O3/ZTO TFTs with improved mobility, threshold voltage and bias stability were obtained. The best electrical properties of the inkjet-printed double-active layer ZTO TFTs were obtained with 0.01 M of In2O3: a mobility of 8.6 cm2/ V s, a threshold voltage of 2.76 V, a subthreshold slope of 0.52 V/dec, and an on-to-off current ratio of 106 . The electrical properties of the inkjet-printed double-active layer oxide TFTs were superior to those of the single-active layered TFTs.
9:00 PM - EM6.3.10
Indium-Zinc-Oxide TFTs Prepared with Electrohydrodynamic-Jet Printing
Young-Jin Kwack 1 , Woon-Seop Choi 1
1 Hoseo University Asan-si Korea (the Republic of)Show Abstract
Oxide Semiconductors have been paid attention to suitable TFTs for OLED because of higher mobility than a-Si TFTs, lower leakage current than LTPS TFTs and even low cost. These oxide thin films can be obtained by simple solution process and applied to printed electronics. Printing process is a way to reduce cost and process time effectively over tranditional vacuum process and photo-lithography by direct patterning. Nevertheless, semiconductor films, in most study of solution processed oxide TFTs, are fabricated by spin coating, which is inadequate for electronics industry. For this reason, researches for various printing methodes on oxide TFTs are needed certainly. Electrohydrodynamic-jet (EHD-jet) technique is avilable to form a fine pattern by electric fields between metal stage and tiny orfice tip.
We opimized EHD-jet printning conditions for IZO solution and fabricated with addition patterning technique IZO TFT sucessfully showing better and stable features than spin coated one. The EHD-fabricated IZO TFTs showed good characteristics at an annealing temperature of 400 and 500 oC. The positive and negative bias stability was also characterized. The EHD jet-printed IZO TFTs showed good electrical properties: mobility of 4.8 cm /Vs, threshold voltage of 8.4 V, on-to-off current ratio of , subthreshold slope of 1.2 V/dec at 400 oC. The positive and the negative bias stress of the EHD-jet printed IZO TFTs were characterized. No negative shifts in the EHD-printed IZO TFTs were observed at process temperatures of 300 and 400 oC under negative bias stress.
9:00 PM - EM6.3.11
Hydrogen Distribution Analysis in Al2O3 Films by Atom Probe Tomography
Yasuo Shimizu 1 , Bin Han 1 , Yuan Tu 1 , Koji Inoue 1 , Fumiko Yano 2 , Masao Inoue 3 , Yorinobu Kunimune 4 , Yasuhiro Shimada 4 , Toshiharu Katayama 4 , Takashi Ide 4 , Yasuyoshi Nagai 1
1 Institute for Materials Research, Tohoku University Ibaraki Japan, 2 Tokyo City University Tokyo Japan, 3 Renesas Electronics Corporation Ibaraki Japan, 4 Renesas Semiconductor Manufacturing Co., Ltd. Ibaraki JapanShow Abstract
Hydrogen (H) induced performance degradation of semiconductor devices has been a serious problem . Aluminum oxide (Al2O3), high-k dielectric material, films were employed for many kind of devices [2,3] and found to provide a high-quality H barrier. It is reported that the H trapping performance of an Al2O3 film strongly depends on the annealing temperature . Therefore, a systematic study of the annealing temperature dependence of H behavior in Al2O3 films is of great importance in order to fully understand its H trapping properties. Laser-assisted atom probe tomography (APT) was reported to be a powerful method for obtaining three-dimensional (3D) elemental distributions in semiconductors and insulators with nearly atomic resolution. For APT measurement, due to the adsorption of residual gas from the APT vacuum chamber onto the apex of the needle specimen, a direct quantitative analysis of H in a sample is challenging issue. Here, we propose that the residual gas in the APT raw data can be eliminated with appropriate methods. In this study, the annealing temperature dependence of the H concentration and distribution in Al2O3 film deposited on Si substrates was investigated .
An Al2O3 film was grown on a Si(100) substrate. First, the Si substrate surface was cleaned by RCA process. Then, a 10-nm-thick Al2O3 film was deposited by atomic layer deposition using sequential exposures of trimethylaluminum and H2O at 300 °C. Lastly, a polycrystalline Si cap layer of approximately 100-nm-thick was deposited on the Al2O3 film by low-pressure chemical vapor deposition at 620 °C. Samples were then annealed at 800-1200 °C for 10 min in a vacuum chamber. A commercial local electrode atom probe (LEAP4000X HR, Cameca Instruments Inc.) equipped with an UV pulsed laser (355 nm) was employed for APT analysis.
The H ions from the residual gas were effectively eliminated from the raw APT data by adjusting the evaporation rate during the APT measurement as the number of H ions adsorbed from the residual gas is inversely proportional to the evaporation rate (defined as the number of ions evaporated per laser pulse). Our APT results demonstrate that H ions piled up in the Si substrate/Al2O3 interface region in the as-grown sample, H pile-up disappeared after annealing at 900 °C or higher. Moreover, the concentration of H in the Al2O3 film decreased with increasing annealing temperature. This research enables to extend to study the H behavior in Al2O3 film involved in the state-of-the-art 3D devices.
This work in Tohoku University was supported in part by JSPS KAKENHI Grant Numbers 26289097 and 15H05413.
 Y. Nagano et al., VLSI Technology Digest of Technical Papers (2003) p. 171.
 Y. Shin et al., IEEE IEDM Technical Digest (2005) p. 327.
 K. Yoshitsugu et al., Phys. Status Solidi C, 10 (2013) 1426.
 B. Yang et al., Appl. Phys. Lett. 79 (2001) 2064.
 B. Han et al., submitted.
9:00 PM - EM6.3.12
High Performance Nitrogen Dioxide Sensor Based on Organic Field-Effect Transistor Utilizing Ultrathin CuPc/PTCDI-C8 Heterojunction
Huidong Fan 1 , XinMing Zhuang 1 , Junsheng Yu 1
1 University of Electronic Science and Technology of China Chengdu ChinaShow Abstract
Organic field-effect transistors (OFETs) with a heterojunction structure were fabricated and the relationship between the performance characteristics with copper phthalocyanine (CuPc) and the dioctyl perylene tetracarboxylic diimide (PTCDI-C8) heterojunctions and the thickness of the PTCDI-C8 layer is investigated. The changes of the electrical parameter are attributable to the morphology of the film and the heterojunction effect. Moreover, the heterojunction OFETs were used as the nitrogen dioxide (NO2) gas sensors, and the sensing properties were characterized with the variation of PTCDI-C8 layer thicknesses, compared to the device with single CuPc active layer, OFET sensors with the optimized film thickness of 0.5 nm PTCDI-C8 and 7 nm CuPc had one order of magnitude enhancement of sensitivity, enabling a detection limitation of NO2 as low as 2 ppm. The sensitivity enhancement was attributed to the intensification of the charge transfer in the heterojunction structure while introducing the oxidizing gas of NO2. This study provides a promising prospect for the application of OFET in room temperature, low-cost and high sensitivity NO2 gas detectors, and describes the importance of active layer thickness to optimize the sensing properties of OFETs.
9:00 PM - EM6.3.13
Threshold Voltage Control in Multilayer-Channel Thin-Film Transistors
Fwzah Alshammari 1 , Jihoon Park 1 , Husam Alshareef 1
1 King Abdullah University of Science and Technology (KAUST) Thuwal Saudi ArabiaShow Abstract
We report an effective strategy for independently tuning the threshold voltage (VTH) of thin-film transistors (TFTs) without degrading field-effect mobility. Our approach is based on using zinc oxide (ZnO)/hafnium oxide (HfO2) multilayer stack as a transistor channel. By optimizing the different layer thicknesses in the multilayer channel stack, enhancement mode transistor operation is achieved. The optimized TFT devices showed saturation field-effect mobility of 14.2 ± 0.9 cm2/V.s along with VTH of 0.1 ± 0.1 V, which represents significant improvement over previous results. Our approach is shown to be effective for obtaining enhancement mode TFTs, while maintaining high mobility and low subthreshold swing, which makes the multilayer ZnO-based devices attractive for various applications.
9:00 PM - EM6.3.14
Balancing Hole and Electron Conduction in Ambipolar Split-Gate Thin-Film Transistor Using Thermal Annealing
Hocheon Yoo 1 , Fabrizio Torricelli 2 , Matteo Ghittorelli 2 , Han-Koo Lee 3 , Edsger Smits 4 , Gerwin Gelinck 4 , Jae Joon Kim 1
1 Pohang University of Science and Technology Pohang Korea (the Republic of), 2 University of Brescia Brescia Italy, 3 Pohang Accelerator Laboratory Pohang Korea (the Republic of), 4 Holst Centre Eindhoven NetherlandsShow Abstract
We present that the hole and electron transport properties in an ambipolar semiconducting polymer can be controlled with thermal annealing. We also show that the split-gate structure offers more accurate characterization for the hole and electron transport parameters such as saturation (µsat.), linear mobility (µlin.), turn-on (Vto), and threshold voltage (Vth) than conventional ambipolar transistor does. As a result, well-balanced hole and electron conduction could be achieved in an ambipolar semiconducting poly-(diketopyrrolopyrrole-terthiophene) (PDPP-3T). It was also observed that hole de-doping (electron doping-like) occurred with thermal annealing, which removed the dipole formation by atmospheric oxygen. Such a recuperation from the atmospherically doped to intrinsically un-doped state changed the characteristics in hole and electron transport, which agreed with the shift in the measured ultraviolet photoelectron spectroscopy (UPS) spectrum. A complementary logic inverter with balanced charging and discharging was demonstrated based on the findings.
9:00 PM - EM6.3.15
Solution Processed P-N Heterojunction Bilayer for Balanced Ambipolar Organic Field- Effect Transistor Based Applications
Jihong Kim 1 , Kang-Jun Baeg 2 , Dongyoon Khim 3 , Min Hye Lee 1 , Yunseul Kim 1 , Yen-Sook Jung 1 , Daehee Lim 1 , Dong-Yu Kim 1
1 Gwangju Institute of Science and Technology Gwangju Korea (the Republic of), 2 Department of Graphic Arts Information Engineering Pukyong National University Busan Korea (the Republic of), 3 Department of Physics Imperial College London London United KingdomShow Abstract
Unique features of π-conjugated organic semiconductors, such as charge generation, transport, and recombination properties, are depending on the materials and their interfaces. Especially, in organic field-effect transistors (OFETs), the channel region, between semiconductor and dielectric layer, is intensely important for charge transport and their electrical property. In addition, organic phototransistors (OPTs) basically have the same structure of OFETs with combining photodiode properties, that results in the controlling the channel conductance via absorption additional light. As using the organic π-conjugated molecules for semiconductor layer in OPTs, the unusual properties of organic molecules, such as photogenerated exciton, and charge separation for generating excess charge carriers, can be used for the photogenerated charges which can play a critical role in the devices. In this study, for OFETs based novel applications, such as OPTs and integrated circuit, solution processed P-N heterojunction bilayer can be developed by using p-, n-type conjugated polymers and orthogonal solvents. OFETs based on bilayer conjugated polymers semiconductor have been researched for controlling charge transport in channel region of the device, and fabricated ambipolar based CMOS-like inverter. Moreover, the photo response is investigated at the P-N interface via illumination with generating of photocurrent which is including in channel region of the device.
9:00 PM - EM6.3.16
Eco-Friendly Flexible Organic Electronics on Bio-Based Substrate
Heejeong Jeong 1 , Singu Han 1 , Hwasung Lee 1
1 Chemical and Biological Engineering Hanbat National University Daejeon Korea (the Republic of)Show Abstract
Recently, the flexible transparently substrates for substituting flexible electronics to existing inorganic substrates have been actively researched. To fabricate the flexible electronics devices, polymeric substrates have usually used such as PET, PEN, PC, PES, etc. However, these substrates have problem that is difficult recycle after use and need long time for biodegradation. Thus, we have developed a flexible transparent substrate using starch that is eco-friendly material substituting old polymeric substrates for the flexible OFETs. Starch substrate enables realization of large area, simple cheap process and has good stability in the aprotic solvents such as toluene or hexane. Also, it has advantage in reducing environmental pollution after service life due to biodegradability. Lastly, we evaluated the usefulness of starch substrate for the flexible electronics and demonstrated the device performance of manufactured organic transistors.
9:00 PM - EM6.3.17
Resistive Switching in VO
2 Nanowires by Applying an Electric Field
via Air-Gap Gates
Teruo Kanki 1 , Masashi Chikanari 1 , Hidekazu Tanaka 1
1 Osaka University Osaka JapanShow Abstract
Vanadium dioxide (VO2) shows huge resistivity change at around room temperature with metal-insulator transition (MIT). New functional devices utilizing this drastic change have been energetically studied. Among them, controlling of MIT by an electric field is especially expected toward the realization of Mott transistor. In this research, we fabricated a side-gate-type field-effect transistor (SG-FET) via air gap with a VO2 nano-wire channel. We have focused on characteristics of SG-FET capable of controlling various kinds of gas atmospheres such as humid air, dry air and reactant gases as chemical and/or electrostatic reaction fields. In this study, we tried to modulate channel resistance by a pure electrostatic field effect under dry N2 atmospheres.
VO2 thin films were deposited on TiO2 (001) substrate and Al2O3 (0001) substrate by using a pulsed laser deposition technique and formed the pattern of SG-FET by using nanoimprint lithography method. The change rate in resistance (, defined as (Roff-Ron)/Roff, where Roff and Ron is the resistance of off-bias and on-bias states, respectively) on Al2O3 (0001) substrate is 0.4% at gate bias VG = 30 V, while the rate on TiO2 (001) substrate is 4.5%, which is 10 times higher than that using Al2O3 (0001) substrate. It is considered that the huge difference was caused by obtaining single crystalline epitaxial VO2 on TiO2 (001) substrate. Furthermore, the change rate in resistance depend on wire width of VO2 channels, that is, when reducing wire width of VO2 channels from 3000 nm to 300 nm on TiO2 (001) substrate, resistance modulation ratio enhanced from 0.7 % to 4.5 %. This indicated the advantage of nanowire and the modulation rate will be drastically enhanced in narrower width. In this symposium, we will show the detail data for difference of the change rate in resistance between in-plane polycrystalline VO2 on Al2O3 (0001) substrate and of single crystalline VO2 on TiO2 (001) substrate, and width of VO2 nanowire dependence of the change rate.
9:00 PM - EM6.3.18
Low-Temperature Spray-Pyrolisis Zinc Oxide Thin-Film Transistors for Hybrid Inverter Circuits
Tiago Gomes 1 , Lucas Fugikawa Santos 1 , Neri Alves 1
1 UNESP Presidente Prudente BrazilShow Abstract
Hybrid printed complementary inverter circuits can be manufactured by using an n-type inorganic transistor, based on a metal oxide active layer, and a p-type organic semiconductor transistor. Some studies have shown that, among the several possibilities available to produce inverter circuits, the hybrid complementary inverter is the most stable and most promising in terms of device performance. In the current work, we present studies of zinc oxide (ZnO) transistors obtained by spray pyrolysis of an organic precursor salt (zinc acetate dehydrate). The morphological and optical properties of the spray-produced ZnO films were characterized by atomic force microscopy (AFM) and UV-Vis and FTIR spectroscopy for different deposition conditions. The transistors were manufactured by spraying the zinc acetate solution (in methoxyethanol) over substrates made of a 200 nm SiO2 layer (which acts as the transistor dielectric layer) which was thermally grown on top of a p-type, highly conductive, Si wafer, used as the transistor gate electrode. The Si/SiO2 substrates were heated up at temperatures between 200oC to 400oC during the spray deposition, in order to promote a more efficient pyrolysis of the organic precursor. After the film deposition, a further annealing in the same range of temperature was performed. The device is completed by the thermal vacuum evaporation of the drain and source electrodes (100 nm thick aluminum layer). The transistor Ion/Ioff ratio, threshold voltage (VT) and charge-carrier mobility (µ) present