In this work we present results concerning the deposition at room temperature of Au nanoparticles of 1.3 nm average diameter on oxidized silicon substrates and with areal densities approaching 10^13 cm^-2 using a physical process based on DC sputtering and inert gaz condensation. The formation and growth of Au nanoclusters occurs through nucleation and coalescence of the 1,3 nm nanoparticles soft-landing on the substrate at room temperatre, which allows the fine tuning of the cluster size and density, is investigated by TEM analysis of samples with increasing Au load, in the range 0-1 mu;g/cm2. These conditions give average gold nanocluster diameter sizes in the range 1,5 - 3,5 nm according the deposition conditions. Taking advantage of the above phenomenon, the nanocluster density and size have been optimized in such a way to attain highly efficient (e.g. in terms of charges/NP and total areal charge density) non-volatile memory devices based on a mixed dielectric stack, 3,5 nm SiO2 tunneling oxide and 20 nm HfO2 control oxide deposited following a low thermal budget RF sputtering process using high purity HfO2 target, with Au NPs used as storage nodes. The above optimization process highlighted the clear correlation existing between the efficiency of the charging process and the mean nearest neighbor distance of the nanocluster film, the latter being a particularly important parameter when the density of nanoclusters is extremely high i.e. above 10^12 cm^-2. The conditions discussed in the paper drive to very large memory windows, as large as 10V for write/erase pulses of 10V height, and excellent charge retention characteristics. The estimated charge loss after a 10 years retention period is less than 40%.

Recently, graphene has attracted great efforts and research due to its exceptional characteristics such as high carrier mobility, large work-function, and optical transparency.¹ Based on these unique properties, graphene seems to be a promising material in nonvolatile memory devices. In this work, the effect of embedding graphene nanoplatelets (GNs) in atomic layer deposited (ALD) ZnO charge trapping layer on the MOS charge trapping memory performance is demonstrated. The MOS charge trapping memory cells are fabricated on an n⁺-type (111) (Antimony doped, 15-20 m#8486;-cm) Si wafer. First, 3.6-nm-thick tunnel oxide Al₂O₃ followed by 2-nm-thick ZnO are deposited at 250°C using ALD. Pristine GNs are deposited by drop-casting technique. Samples are placed on hot-plate at 110°C and 2-2.5 ml of 0.05 mg/ml graphene solution is drop-casted slowly by using plastic pipette then samples are left to dry for 5 minutes on hot-plate. Then, a 2-nm-thick ZnO followed by a 15-nm-thick Al₂O₃ blocking oxide are ALD deposited at 250°C. Finally, a 400-nm-thick Al layer with a diameter of 1 mm is sputtered using a shadow mask for the gate contact. The charging effect in the fabricated memory cells is analyzed by studying the high frequency (1 MHz) C-V_gate curves of the programmed and erased states. The gate voltage of the memory cells is swept at -12/12 V backward and forward. The obtained memory hysteresis shows a 6.5 V window. The direction of the programmed state shows that the memory is programmed by trapping only electrons in the storage media. Also, the measured memory hysteresis at different operating voltages is studied and a large memory window (4 V) is obtained at a reduced operating voltage (6 V) and the charge trap states density of the GNs is calculated² to be roughly 1.08×10¹² cm^-2. Without GNs, the obtained threshold voltage shift (ΔV_t) is negligible indicating that GNs behave as charge trapping centers. Moreover, the retention of the memory is analyzed by programming/erasing the memory at 10/-10 V and measuring the ΔV_t in time at room temperature. The memory showed an excellent retention characteristic where the extrapolation to 10 years indicates a 25% loss of the initial stored charge. The remarkable retention characteristic indicates that using GNs in the charge storage media allows further scaling the tunnel oxide thickness and consequently the gate length; thus increasing the memory density without degrading the retention property of the memory. Also, the endurance characteristic of the memory is studied by measuring the memory cell hysteresis at 10/-10 V forward and backward at room temperature up to 10⁴ cycles where the ΔV_t is reduced by 13.3% indicating a good endurance of such memory structure. Finally, the results indicate that graphene nanoplatelets have great potential for future low-cost/low-power memory devices. 1- F. Schwierz, Nat. Nanotechnol. 5, 487-496 (2010). 2- N. El-Atab, et al, Appl. Phys. Lett 104, 013112 (2014).

There are tremendous efforts in academia and industry researching various emerging nonvolatile memory technologies. In this presentation, I will only talk about charge trapping memories and focus on reporting some recent effort in my group on nanocrystal-based charge trapping nonvolatile memories and wide bandgap semiconductor memories. Having a goal of extending scaling limit of nanocrystal memories in mind, we explored a few approaches in addition to our earlier silicide nanocrystal approach, such as making vertical nanocrystal memory cells, assembling nanocrystals using di-block co-polymer process, and using parallel-assembled carbon nanotubes and even graphene as channels of the devices. With the purpose of being able to store data for millions of years, we carried out ZnO-based wide bandgap semiconductor memories and preliminary results suggest that this approach is promising.

Devices with a polymer film blended with metal nanparticles exhibit resistive switches, and they are regarded as the next-generation memory devices. They have advantages of low fabrication cost and high flexibility of the active layer. However, resistive switching devices exploring the interfaces between the active layer and the electrodes have been rarely reported, whereas the interfaces have significant effect on the electrical behavior of many devices. In this talk, I will present resistive switching devices with a polymer film blended with gold nanoparticles capped with conjugated organic ligands. The resistive switches of these devices are sensitive to the electrode materials.

The possibility of developing fully organic electronic circuits is critically dependent on the ability to realize a full set of electronic functionalities based on organic devices. In order to complete the scene, a fundamental element is still missing, i.e. reliable data storage. In this work we introduce an interesting approach consisting in the employment of a Low Voltage Organic Thin Film Transistor (OTFT) realized with a combination of two insulating layers, namely a high-k ultrathin aluminum oxide layer (average thickness around 5-6 nm) and a second, low-k, ultrathin insulating layer (thickness from 25 up to 80 nm), made out of Parylene C and deposited from vapor phase. Thanks to the high capacitance coupling induced by the ultrathin double-layer insulating films, such devices can be operated at ultralow voltages, as low as 1V, showing mobility up to 0.4 cm²/Vs, I_on/I_off up to 10⁵ and remarkably low leakage currents (100 pA), with a typical breakdown field higher that 5MV/cm. Moreover, these devices were fabricated on a highly flexible (13 um thick) Kapton substrate, and we will demonstrate that their electrical performances are not affected by a continuous mechanical deformation, even after more than 1000 cycles at bending radii as small as 150 um. Very interestingly, we have observed that by applying a pulsed gate voltage, slightly higher than the nominal breakdown voltage, it is possible to induce a pronounced threshold voltage shift in the transistor behavior. A study of the influence of the polarization parameters, such as applied gate field, pulse duration, and number of applied pulses, on the main parameters of the fabricated memory elements (i.e. Ion/Ioff and retention time) will be discussed as well as the physical principle behind the observed behavior. In particular, we observed that, when a high electrical field is applied, the charges injected into the device channel can tunnel and get trapped into the Parylene C low-k dielectric, whereas, the Al₂O₃ high-k blocking dielectric avoid trapped charges to move all the way through the gate electrode.
Interestingly, it was found that, by properly designing the double layer gate dielectric, it is possible to achieve threshold voltage shifts higher than 2V, giving rise to a remarkably high I_on/I_off ratio, usually in the range of 10³, measured at -1V, with a retention time up to 5x10⁶s. Finally we have integrated an array of OTFTs memory elements with a piezo-resistive rubber sheet, which was connected in series with the gate electrodes of each singly memory cell. We will show that using such an approach it is possible to trigger the memory element with a mechanical stimulus. This approach represents a very interesting solution for the realization of artificial skin in the human-robot interaction field.

Electrically tunable resistors realized in two terminal structures seem to be one of the most versatile innovations in the semiconductor industry with many possible applications such as logic circuitry or neuromorphic systems. In particular, inorganic resistive switching devices utilized as non-volatile memory are close to commercialization. Hysteretic current-voltage (IV) characteristics have also been observed from a huge manifold of organic devices employing different π-conjugated small molecules or polymers as well as dielectric materials like poly(methyl methacrylate) (PMMA). However, despite vital academic interest no consistent explanation of the working mechanism of resistive switching elements has been given to date. Various mechanisms are usually suggested, including charge-trapping and charge transfer mechanisms, filament formation, coulomb blockade or molecular conformation changes.
Based on our most recent work^[1], we here present a set of experiments (I/V characterization, photovoltaic measurements, impedance spectroscopy) to explain unipolar resistance switching: For the first time we are able to unambiguously rule out all charging based models which were held responsible for the switching in organic devices and show that the memory behaviour can be interpreted as the formation and rupture of a conductive pathway (‘filament&’). We demonstrate that unipolar resistive switching is a universal and largely material independent (electrodes AND organics) property in electrode/organic/electrode thin-film structures.
We also report on the fabrication of organic resistive switches using environmentally friendly inkjet-printing methods and their integration into fully functional hybrid crossbar array structures. Unipolar resistive switches can be integrated into memory arrays by utilizing a diode as selector device. In contrast to a planar transistor, a diode is itself realized as a 2-terminal device allowing for high density '4F²' integration. The requirements to such a diode will be elucidated and a high-performance organic diode, fulfilling all needs, is demonstrated.
We will further present novel and unique applications of organic resistive switching devices like flexible flat-panel image and x-ray detectors.
[1] S. Nau, S. Sax, E. J. W. List-Kratochvil, #8218;Unravelling the nature of unipolar resistance switching by utilizing the photovoltaic effect‘, Advanced Materials 2014, 26, 2508.

Charge-storage memories based on metal-oxide-semiconductor (MOS) structure have been intensively studied using various formats of charge storage media. Instead of using MOS structure with bulk semiconductor, we investigate the charge storage memory based on solution processed zinc-tin oxide (ZTO) thin film transistors (TFTs). The solution processed ZTO film is only 3-5 nm in thickness and the ZTO TFT with SiO₂ dielectrics exhibits a good field-effect mobility of ~4 cm²/Vs, small subthreshold slope of ~0.3 V/decade and high on/off ratio of ~10⁸. After introducing a Ni charge storage layer and an AlO_x tunneling layer, the ZTO TFT I_D-V_G transfer characteristics can be horizontally shifted by +6V when applying a positive gate bias of 35V. The shift of I_D-V_G transfer characteristics can be recovered by applying a negative bias with light illumination. The charge transport between ZTO TFT channel region and Ni charge storage layer will be discussed based on the migration of electrons and charged oxygen vacancies, under the influence of bias and light illumination.

Resistive switching, the reversible modulation of electronic conductivity, is of interest for prospective memory devices that could be perfect electronic memory. Despite different types of ReRAM (Resistive Random Access Memory), organic based ReRAM is an object of special interest due to ability to produce high performance devices using relatively simple technology. There is still much uncertainty about mechanisms driving these effects that our work attempts to bring to light.
We have discover, that admixtion of phososensitive organic molecules (different metal phthalocyanines and metal tienoporphyrazines) to polymer materials (e.g. polystyrene, in which electrically induced resistive switching where reported before) results in possibility of adding photo-controllable properties to organic memory devices.
We observed two different effects achievable with such device improvement:
1) Ability to change critical voltage/current parameters for electrically resistive switching effect for illuminated sample (for different materials and illumination sources both upping and lowering of critical switching voltage/current levels were present).
2) The possibility of fully light-induced switching of device nonvolatile resistive state i.e. effect of changing device state without applying electrical voltage in both directions between states with significantly different resistance. The resulting states had same nonvolatile properties as the ones achieved with electrically induced switching.
To clarify, these effects were also present in devices made from organic dyes that were used as photosensitive admixture. The observed effects were tested in coplanar and “sandwich” geometry, and have shown no dependency from contact material (ITO, Ag or Cu were used as contacts).
For the undoped polystyrene, all our results propose the filament formation model as the most possible mechanism of observed effects. In that case, the filaments could be possibly originating from metal particles injected into an organic film from metallic contacts during the initial device electroforming. Observed light-induced effects could be explained only with the charge-storage related resistive switching, thus bringing a requirement to consider crossover between this possible switching mechanisms as an explanation for observable effects.
This demonstrated necessity to consider more than one mechanism of resistive switching could bring better explanation of different results often achieved on the same materials and similar devices under different conditions or different research methods.
From practical point of view, the effect of photo-induced resistive switching could lead to a novel type of organic based devices like light-electrical interfaces, or photo-programmable memory.

Hydrogen silsesquioxane (HSQ) is commonly used as a dielectric insulating layer in the electronic industry. In this paper, we demonstrate that this material shows resistive switching properties, and it can be potentially used as an active layer in resistive switching memory devices.
The device was fabricated on a p-type silicon substrate with Cr/Au bottom contact. The HSQ active layer was deposited by spin coating and the device region was defined by electron beam exposure. A top aluminium electrode was then evaporated onto the HSQ layer. The thickness of the HSQ layer after the exposure step was 40nm. The switching voltage is in order of several volts, and a greater than six order of magnitude difference in resistance between the high resistive state and low resistive state is observed.
A Metal-Insulator-Metal (MIM) device with ITO bottom contact was also fabricated, and resistive switching behaviour was observed using conductive atomic force microscopy (C-AFM) measurements in which the C-AFM tip acted as the top electrode.
X-ray photoelectron spectroscopy (XPS) data shows the HSQ layer becomes SiO_x and SiO₂-like upon cross-linking by electron beam exposure. The combination of using HSQ and electron beam lithography allows fabrication of resistive switching memory devices with an endless combination of desired shapes in nanometre-scale.

Photochromic molecules provide an intriguing and relatively untapped alternative to traditional materials utilized in organic memory devices. We have recently reported on a new prototype of a nonvolatile light-emitting organic memory (LE-OMEM) that integrates a layer of crosslinkable dithienylethene photochromes (XDTE) into a solution-processed, multilayer OLED. The XDTE molecules undergo a change in both their UV-visible absorption and energy level position due to a photo- and/or electrically-induced ring-opening/-closing reaction. Exploiting the difference in HOMO and LUMO energies of both isomers and the subsequent change in hole-injection barrier we use this XDTE layer as an electrical switch within our OLED layer stack. Optimized devices have displayed ON/OFF ratios in both current and electroluminescence of greater than 10⁴. We investigate both optical and electrical programming of the OMEM devices and show that precise control of the ratio of both isomers in the active layer enables access to a multitude of intermediate states demonstrating the potential of these devices for future multilevel memory applications. We also discuss the difference in the molecular-scale mechanisms that are responsible for the optically- and electrically-induced switching effect in these devices by in-situ monitoring of the fraction of closed molecules as a function of the external stimulus.

In this paper, the gap-fill performance and behaviors of the amorphous carbon layer (ACL) film processed by reactive ion deposition system using the acetylene as the precursor. The Gap-fill ability of ACL film used as the hard-mask of the double pattering process in semiconductor integration process have significantly change for the reactive oxygen species (ROS) with the variation of the pulsed direct current (DC) bias condition. The gap-fill ability of ACL film used as the hard-mask of the double pattering process in semiconductor integration process have significantly change for the reactive oxygen species (ROS) with the variation of the pulsed direct current (DC) bias condition. The gap-filled profile of a-C:H film deposited on the pattered wafer with the aspect ratio (AR) >4.0 was analyzed by TEM and SEM and the deposited film properties were characterized by Fourier transform infrared (FT-IR) spectroscope, Raman spectroscope, stress gauge, and ellipsometry. In this experiment we processed by reactive ion deposition system with the reactive oxygen species. We had been performed at the process condition test with Acetlyene (C₂H₂) as the precursor. Reactive oxygen species (ROS) ratio to precursor depended on gap-fill ability of ACL film and then the bottom-up thickness was varied on substrate temperature and applied the pulsed DC power at 20kHz.

Resistive switching materials like titania (TiO₂) are potentially capable for applications in next-generation semiconductor devices or as components of artificial neurons. Resistive switching effect of metal oxides is based on phase-change mechanisms induced by accumulation of oxygen vacancy defects (VO) and following transformation of insulating TiO₂ into substoichiometric conductive phases. For this reason the VO migration is a crucial mechanism for resistive switching. In this work we investigate the dynamics of oxygen vacancies in detailed computational studies. We involve thermodynamics in calculations of the free energy surface by metadynamics and obtain accurate minimum energy paths (MEP) for rutile and anatase. We assume the vacancy to be neutral in anatase and double positively charged in rutile, respectively.
We employ the charge self-consistent Density-Functional based Tight-Binding (SCC-DFTB) method implemented in the DFTB⁺ code, together with the tiorg parameter set. We calculate free energy profiles for the VO diffusion using metadynamics, employing a modified version of the PLUMED code, coupled to DFTB⁺, which implements a permutation invariant vacancy tracking (PIVOT) collective variable. This method provides a technique for rare event sampling without specifying reaction paths.
Furthermore, we also perform nudged elastic band calculations to find the MEP for essential VO transitions using the ab-initio DFT method provided by the vasp code.
We find free energy barriers and MEP in good agreement. Both crystal structures provide three symmetry inequivalent hopping events which enable three-dimensional diffusion. In either case, we identify a highly preferred hopping event. We also find a strong dependency of the activation energy on the crystallographic direction, the crystal structure and the material density. Our results also indicate a high thermal stability of rutile-like structures against vacancy diffusion induced phase-change in contrast to anatase.

ReRAM devices have shown promising functional results despite controversial models of switching mechanism. It has been well reported that "bubbles" can develop on the surface of devices as a result of the switching process. We see similar behavior in our TiN/SiOx/TiN devices, leading to insulating electrode regions that limit the number of successful switching cycles. Literature relies on material analysis to attribute such defects to oxygen release without certain characterization of any emitted gas. We present results from dynamic RGA mass-spectrometry measurements in high vacuum during in-situ switching, demonstrating positive identification of oxygen species emission from our devices. This will allow for a more certain understanding of switching mechanics and more reliable and long-lasting future devices.

We report results on the activation energy for diffusion of isolated and aggregated copper ions in crystalline and amorphous silicon dioxide based on density functional theory (DFT) and bond order molecular dynamics calculations. The minimum energy pathways for diffusion of copper are studied for the alpha-quartz, alpha-cristobalite, and amorphous phases of silicon dioxide as function of the copper cluster size using the nudged elastic band method. The DFT results provide insight into the operation of conductive-bridging random-access memory (M-RRAM) cells and validation data for the force-fields that can be employed to simulate the dynamical operation of the cells. To investigate the implications of stochastic Cu migration and clustering in SiO₂ on the variability and reliability of the devices, we use simulations of metallic filament formation. These results have implications on data retention characteristics allowed by the multiple order of magnitude separation between the resistance states in these devices.

This report focuses on control of resistive switching (switching voltage) in magnetite (Fe₃O₄) thin film grown on stepped surfaces. Films were deposited by means of Molecular Beam Epitaxy system on MgO (100) substrates miscut along the <010> axis with miscut angles of 4°. The periodicity of stepped MgO surface can be controlled by the annealing temperature and time. In this way, substrates with different steps densities were prepared. We studied the field-induced switching along two crystallographic identical directions: along- and perpendicular to the steps, i.e. along <001> and perpendicular <010> directions. Resistive switching has been observed bellow Verwey temperature, at 100-80 K. Sharp jump in current was observed when source voltage reached the critical value. As temperature decreased, switching voltage increased. During the electric measurement, current was limited to 1 mA by setting the compliance appropriately in order to protect the devices from breakdown. Crucially, the switching voltage was different along- and perpendicular to the steps, along <001> and <010> in this cubic spinel. Along the steps, a lower switching voltage is required to enable the lower conducting state than that required perpendicular to the steps. This is attributed to the high density of anti-phase boundaries present at step edges. Number of switching cycles has been demonstrated for the electric field applied along the steps. A maximum of 16,000 cycles were performed without damaging the devices or alteration of the switching characteristics. This work demonstrates the way to alter switching parameters in oxides via controlled introduction of defects and substrate morphology.

Metallic nanodots (NDs) have received much attention because of their potential application to charge storage nodes. In the spintronic application of metallic NDs, high-density formation of magnetic NDs and control of the magnetization change are major concerns.#12288; In this work, we reported recent our achievement of the formation of magnetic NDs made of FePt alloy by exposing a metal bi-layer stack to H₂-RP and characterized their magnetization properties.
After conventional wet-chemical cleaning steps of p-type Si(100) wafers, SiO₂ layers was grown at 1000 #730;C in dry O₂ ambience. Ultrathin Fe layers were first deposited uniformly on the SiO₂ layers by electron beam evaporation, and then covered uniformly with an ultrathin Pt layer without air exposure. Subsequently, the metal bi-layer stacks so-prepared were exposed simply to a remote H₂ plasma without external heating.
Topographic images taken by AFM observations before and after remote H₂ plasma exposure confirm that the ultrathin bi-layers with a uniform surface coverage are drastically changed to NDs with an areal density as high as ~5x10¹¹ cm^-2 by exposing to remote H₂ plasma as a result of surface migration of metal atoms and their cohesive action promoted with progressive surface recombination of H-radicals on metal surface. The magnetic properties evaluated by measuring in-plane and out-of-plane magnetic field within ±15 kOe show that the FePt-alloy NDs exhibit a large perpendicular anisotropy with an out-of-plane coercivity of ~4.8 kOe while the in-plane and out-of-plane coercivities of Pt/Fe bi-layer are almost zero reflecting the small magneto-crystalline anisotropy of Fe layer. The x-ray diffraction pattern of FePt-alloy NDs confirms the formation of (001) oriented L1₀-ordering FePt phase. In addition, electron conduction measured through FePt-NDs on ~1.7nm-thick SiO₂/c-Si by using a magnetized CoPtCr-coated AFM probe at room temperature confirm a a distinct anisotropic magnetoresistance reflecting characteristic of the L1₀ FePt phase.

The realization of high-density, low-cost storage media of high longevity can be enabled by the technological development of programmable and readable nonvolatile organic memory devices. Amid the ongoing efforts for the development of high density nonvolatile memory systems [1] the use of scanning probe techniques [2] has emerged as a promising concept for the realization of high capacity and storage density memory devices. Here we show that the mechanical interaction between the electrically unbiased tip of the atomic force microscope and the surface of π-conjugated polymeric films produces a local increase of molecular disorder, inducing a localized lowering of the semiconductor conductivity, not associated to detectable modifications in the surface topography [3]. This phenomenon allows for the swift production of low-conductivity patterns on the film surface at a speed exceeding 20 mm s^-1; the patterned paths have a resolution in the order of the tip size (20 nm) and they are clearly detectable in the conductivity maps, as registered by the conducting-atomic force microscopy tip.
References
[1] P. Heremans, G. H. Gelinck, R. Müller, K.-J. Baeg, D.-Y. Kim, Y.-Y. Noh, Chem. Mater., 2011, 23, 341-358
[2] C. D. Wright, P. Shah, L. Wang, M. M. Aziz, A. Sebastian, H. Pozidis, Appl. Phys. Lett.,2010, 97, 173104; A. A. Golriz, T. Kaule, J. Heller, M. B. Untch, P. Schattling, P. Theato, M. Toda, S. Yoshida,T. Ono, H.-J. Butt, J.S. Gutmann, R. Berger, Nanoscale, 2011, 3, 5049-5058
[3] M. Farina, T. Ye, G. Lanzani, A. di Donato, G. Venanzoni, D. Mencarelli, T. Pietrangelo, A. Morini, P. E. Keivanidis, Nat. Comm.2013, 4, 2668

Emerging nonvolatile memories (NVM) can blur the boundaries between
memory and storage by combining the benefits of solid-state memory
(high performance, robustness) with those of hard-disk magnetic storage (low
cost, long-term retention). But such a Storage-Class Memory (SCM)
requires large nonvolatile memory arrays that can be manufactured
at a very low cost per bit by stacking multiple layers of NVM
crosspoint arrays in 3D.
Such dense arrays could also enable non-Von Neumann neuromorphic
computation, with each NVM device acting as a modifiable synaptic
“weight.” For both applications, each NVM element needs its own
"access device" (AD), whose very large (>1e6) nonlinearity can
drive high current density through selected cells yet maintain
ultralow leakage through the billions of unselected cells.
This talk reviews our work on novel access devices based on
Cu-containing Mixed-Ionic-Electronic-Conduction (MIEC)
materials[1-7]. Our group at IBM Research - Almaden has shown that
such MIEC-based ADs offer the large ON/OFF ratios, high voltage
margin (over which current < 10nA), and ultralow leakage (<10pA)
needed to enable large arrays, as well as the high current
densities needed for PCM and the fully bipolar operation needed for
high-performance RRAM[1,2]. We have shown that MIEC-based ADs can
be integrated at 100% yield (at 512kBit scale) [3], can provide
write-level (>100uA) currents within 15ns[3], and can be scaled to
the <30nm CDs and <12nm thicknesses found in advanced technology
nodes[4].
We have demonstrated that MIEC-based ADs can sustain and move
rapidly between un-selected, half-selected, selected- for-read, and
selected-for-write states [5], maintaining ultralow leakage over
hours and recovering to low leakage after write (30-50uA)
operations in <1us (read (3-6uA) recovery is even faster). Read
operations can be fast enough for use with MRAM (sub-50ns) [5],
with inherently-fast thin MIEC ADs offering similar speeds at
modest overvoltages (for minimal read disturb)[5]. Numerical
modeling of these MIEC-based ADs has shown that their operation
depends on Cu+ mediated hole conduction [6]. Circuit-level SPICE
simulations [7] have shown that the design of a crossbar array with
MIEC (or any other AD) is intimately connected to the
characteristics of the NVM memory element. Scaled MIEC ADs are
suitable for large crossbar arrays of resistive-NVM devices with
low (<1.2V) switching voltages, and stacking two MIEC ADs can
support switching voltages up to 2.5V [7].
[1] K. Gopalakrishnan et al., Symposium on VLSI Technology, T194 (2010).
[2] R. S. Shenoy et al., Symposium on VLSI Technology, T5B1 (2011).
[3] G. W. Burr et al., Symposium on VLSI Technology, T5.4 (2012).
[4] K. Virwani et al., IEDM Technical Digest, 2.7 (2012).
[5] G. W. Burr et al., Symposium on VLSI Technology, T6.4 (2013).
[6] A. Padilla et al., Device Research Conference, III-53 (2014).
[7] P. Narayanan et al., Device Research Conference, V.-A5 (2014).

As the increasing demand of non-volatile storage devices, the NAND flash memory technology has been recently continued to scale down because of productivity. However, the scaled NAND flash memory shows in degradation of memory cell reliability that coming from NAND cell program/erase (P/E) operations which lead to electrical field stress and trap generation in the tunnel oxide (tox) and inter-poly dielectrics. One of the ways to enhancing the tox quality is an adaptation of oxynitride in tox bulk and its interface which can provide better dielectric quality under stress condition. In this study, we controll nitrogen profile in a thin tox using a modification of a tox oxidation and an annealing and nitridation process which based on sub 20-nm technology. The nitrogen concentration profiling and composition under tox have been observed by secondary ion mass spectroscopy and x-ray photoelectron spectroscopy. Also, electrical properties of tox are characterized with technique of charge-pumping (CP), charge-to-breakdown(Qbd), stress-induced leakage current (SILC) and random telegraph noise (RTN). We can achieve the enhancg quality of tox (reduced charge traping in tox verified from CP, Qbd, SILC, RTN measuements) from a moderate oxynitridation process in tox bulk and interface. These results indicate that the oxynitrided tox not only makes narrow distribution of cells, but also induces less performance degradation after P/E cycles, compared with conventional NAND cells.

The charge trap nitride (CTD) based 3D NAND flash memories (3D NAND) have came into the world to overcome the scaling limitation of the floating gate (FG) based 2D NAND flash memories (2D NAND). In the 3D NAND, the poly crystalline silicon (poly-Si) is essential as the channel in vertically stackable devices for the cost reduction. However, the poly-Si channel is more sensitively dependent on temperature change than the single crystalline Si. It is shown that the threshold voltage (Vth) of 3D NAND, which is programmed at hot temperature, is more changed with cold temperature during reading procedure than that of 2D NAND. As well as this Vth shift, the Vth distribution widening by temperature change is significantly increased in 3D NAND. These disadvantages should be caused by poly-Si with problematic low carrier mobility due to defects such as grain boundary (GB) and trap sites, which are located at interface between channel and oxide as well as in poly-Si bulk. In this paper, the relations between the current and the temperature characteristics was discussed. It was observed that the temperature characteristics were improved with increasing the current. Then, we have proposed the improvement method of poly-Si channel quality, such as annealing and surface treatment. Using the cell I-V measurement, X-ray reflectivity (XRR) and TCAD simulation, we successfully modeled the effect of crystallinity and interface trap on temperature characteristics of 3D NAND. It was observed that the increasing of annealing temperature had resulted in improving crystallinity and interface defect densities, which induced high current mobility and then, reduced Vth shift by temperature change. Finally, we represented the improvement of Vth distribution by these progressive treatments from the viewpoint of the chip level.

High- and low-thermal annealing treatments have been widely researched for improving electrical properties of dielectrics (such as silicon dioxide, aluminum oxide, and so on). In CMOS technology, those ones are already adopted to cure the damaged oxides due to ion implantation and etching processes, or prepare high quality oxide layers. In this paper, we will introduce high-temperature annealing process to enhance reliability characteristics under 20-nm technology node. During the fabrication of NAND Flash memory, various etching and ion implantation process are used for patterning narrow structures, forming proper concentration of p-/n-wells and cleaning organic residuals. Especially, etching process makes lattice defects and impurities on the surface of silicon and dielectrics, which degrade electron mobility and charge storage capability of MOSFET and NAND cells. To overcome these obstacles, we apply high-temperature annealing treatment after several etching processes. To confirm the improvement of NAND cells, we measure charge pump, DC-IV properties in the test elements and extract endurance and retention properties in NAND chips.

Recently, indium-nitride nanoparticles (InN-NPs) have gained a growing attention due to their excellent optoelectronic properties such as high electron mobility, small band gap, and terahertz/near-infrared emission. In addition, InN-NPs have the largest electron affinity among all semiconductors which is estimated to be 5.5-6.1 eV with respect to the vacuum level¹. This large electron affinity is a desired property for charge trapping materials in memory devices because it increases the energy barrier for electrons stored in the InN-NPs which exponentially reduces the charge leakage. In this work, the effect of embedding InN NPs in ZnO on the charge trapping memory performance is studied.
The MOS memory cells were fabricated on an n⁺-type (111) (Antimony doped, 15-20 m#8486;-cm) Si wafer. 3.6-nm-thick Al₂O₃ tunnel oxide followed by 2-nm-thick ZnO charge trapping layer were deposited at 250°C using Cambridge Nanotech Savannah-100 atomic layer deposition (ALD) system. The InN-NPs in solution was then spin casted on to the substrates with a spin speed of 700 rpm, 250 rpm/second ramp rate for 10 seconds and samples were left to dry for 5 minutes on hot-plate. Then a 2-nm-thick ZnO charge trapping layer followed by a 15-nm-thick Al₂O₃ blocking oxide were deposited at 250°C by ALD. Finally, using a shadow mask with 1 mm openings, a 400-nm-thick Al layer was sputtered as the gate contact.
High frequency C-V measurements show that, a memory effect is observed, due to the charging of InN-NPs. By sweeping the gate voltage from - 4 V to 4 V forward and backward, the memory shows a noticeable threshold voltage shift (ΔV_t) of 2 V which indicates that InN-NPs act as charge trapping centers and their charge trap states density is calculated² and found to be 4.78 × 10¹¹ cm^-2. Without InN-NPs, the observed memory hysteresis is negligible. At higher programming voltages of 10 V, a ΔV_t of 5 V is achieved and the ΔV_t direction indicates that electrons tunnel from channel to charge storage layer. Moreover, the retention characteristic of the memory was characterized at room temperature by studying the measured V_t shift vs. time. The memory shows an excellent retention characteristic where 22% of the initial charge is lost in 10 years. Also, the energy band diagram of the memory structure is analyzed. The smaller conduction band offset between Si channel and Al₂O₃ tunnel oxide (ΔE_c = 1.47 eV << ΔE_v = 4.08 eV) indicates that electrons have a much higher tunneling probability than holes. This supports the observed electrons storage. Also, the large electron affinity of the InN-NPs increases the energy barrier for electrons from 1.9 eV to 3.25 eV which exponentially reduces charge leakage. Finally, the results indicate that InN-NPs have great potential for future low-cost and low-power memory devices.
1- S. X. Li, et al., Phys. Rev. B 71, 161201(R) (2005).
2- N. El-Atab, et al, Appl. Phys. Lett 104, 013112 (2014).

The emerging power management, automotive and Internet of Things applications require low-cost embedded non-volatile memories (NVM) with enhanced reliability. Single poly reprogrammable floating gate (FG) NVM with no additional masks to the core CMOS process flow is one of the main candidates for the mentioned applications, especially when memory densities below 0.5Mbit are required. Integration of single poly NVM into CMOS is often accompanied by endurance/retention limitations. For a properly designed memory (sufficient bottom oxide thickness, optimized cell geometry and implants, verified array organization and programn/erase mechanisms), the employed materials limit the reliability performance. Numerous observations of front end (FE) and back end (BE) dielectrics influence on the FG NVM retention were reported. Some of these effects were registered in TowerJazz CMOS technologies and NVM devices were optimized accordingly. When extending the operating temperature range of the developed devices to 150^oC-175^oC, it was found that retention was limited by hydrogen generation and hydrogen species migration from the BE to the charged FG.
At the beginning of CMOS technologies, it was noticed that generation of hydrogen takes place in microcircuits with aluminum metallization, possibly through Al reaction with the residual moisture in the dielectrics. Besides passivation of the surface states, hydrogen was found to influence NVM reliability. In a limited number of works, control of hydrogen approaching the FGs was performed by optimization of dielectric layers ( recipes of spacer and contact etch stop nitrides, oxide in the salicidation scheme, special anneals of pre-metal dielectrics, etc.). We review the advantages and limitations of the corresponding approaches and report an additional critical improvement obtained by the control of hydrogen generation in the BE processing. Tuning of the generated hydrogen amount was achieved by using cap layers with small amount of moisture as a part of the intermetal dielectrics in combination with special metal etch recipes. The role of in-process UV in the generation of hydrogen ions was also investigated .
The dominant hydrogen related retention mechanism was confirmed in several TowerJazz fabs for different types of single poly NVM. The developed approach allowed to guarantee the automotive level reliability of MTP Y-Flash (single Poly FG NVM with the cell size of 3um²/cell in 0.18um DRs, allowing embedded NVM modules of up to 64kbit) .

In this work we examine the memory properties of Metal Alumina Nitride Oxide Silicon (MANOS) devices with emphasis on the erase performance as a function of the post deposition annealing conditions. Al₂O₃/Si₃N₄/SiO₂ stacks having thicknesses of 15/6.5/3.5 nm were fabricated on p-type silicon substrates. The Al₂O₃ layer was formed by atomic layer deposition using H₂O/TMA at 300 ^oC. Post deposition annealing (PDA) of the samples was performed at 850 or 1050 ^oC using two different PDA processes: (1) furnace annealing (FA) for 15 min and (2) rapid thermal annealing (RTA) for 1 or 5 min. Pt-gate MANOS capacitors were fabricated by photolithography and lift-off process. The capacitance equivalent thickness, as extracted from Capacitance-Voltage characteristics strongly depends upon the PDA process being smaller for the FA samples. The current density-tunnel oxide electric field (J-E) characteristics of the unannealed samples, in the negative bias regime, are dominated by gate electron injection effects. Temperature dependent current-voltage characteristics within the temperature range of 100-380K show negligible thermal activation. This type of conduction is attributed to trap assisted tunneling via defect bands within the Al₂O₃. On the contrary, the FA samples exhibit significantly reduced currents with a dominant conduction mechanism arising from substrate hole direct tunneling for tunnel oxide fields within the range of 8-13 MV/cm and hole FN injection for fields above 13 MV/cm. The RTA processed samples exhibit, in the negative gate voltage regime, a conduction behavior where both electron injection from the gate and hole injection from the substrate coexist. Incremental step pulse programing using either positive or negative pulses measurements supports the above findings; only the furnace processed samples exhibit significant hole trapping effect with ΔV_FB~-5V. Erase performance measurements revealed that the FA samples have the fastest erase transitions from the write state. The above indicate that the PDA thermal budget has a profound influence on the defect bands via which Al₂O₃ electron transport takes place. Our study reveals that PDA at a temperature as small as 850 ^oC for 15 min is capable to eliminate a significant portion of the defect states and thus to greatly improve the erase performance of MANOS memory stacks.

The global market for the printed electronics (PE) totaled over US$3.6 billion recently (2013). In the following 5-10 years, PE will enjoy a high annual growth rate and reach US$ 44 billion in 2021. Currently large-area printed sensors enter the market with a small volume (US$0.14 billion) and will greatly expand to US$ 2.8 billion in next ten years. In reducing cost of these printed devices, printed memory and logic functions are urgently required and will drive the future development of PE market. Memory card based on traditional Si microelectronics costs US$2-10 per piece. Very tiny Si chips must be assemblied into the large-area plastic card and the assembly cost is larger than the chip itself, taking more than half of the total cost. Printed memory devices don't need complicated assembly and are expected to cost below US$0.5 per piece.
A ferroelectric (Fe) polymer was developed for printed memory cards. However, the electrical switching of Fe polymers, P(VDF-TrFE), requires a relatively large coercive field of ~MV/cm with thickness down to 100nm, and the coercive field required to reverse the macroscopic polarization increases with decreasing film thickness [R. Naber, etc., J. Phys. D: Appl. Phys. 39, 1984(2006)]. Thus, it is difficult to obtain large enough memory window with program and erase voltages below 20V. A floating-gate transistor is a field-effect transistor with two gate electrodes. In addition to the control gate, similar to that in a regular transistor, it has a floating gate embedded in the gate dielectric. When the dielectric is thin enough, electronic charge can be brought onto the floating gate by quantum tunneling or thermal emission when a program voltage is applied. The floating gate transistor has intrinsic benefits operating under low voltages with dielectric thickness well below 100nm.
In this work, Si-SiO₂ core-shell nanoparticles (smaller than 5nm) are formulated into colloidal solutions and embedded into hybrid dielectric layers, acting as floating gate for non-volatile memory transistors. The hybrid organic/inorganic dielectrics is developed by UV curable Sol-Gel methods. From 10nm to 100nm thick hybrid dielectrics is feasible by dip-coating method with dielectric strength up to 2MV/cm and leakage current below 1uA/cm²[Jina Hwang, etc, Current Applied Physics 11, S154-S157 (2011)]. With dielectric strength of 2MV/cm, 50nm thick dielectric layer can work up to 10V and this voltage is consistent with low-voltage operation below 10V. The interconnections between different layers (source, drain and gate) are formed by laser ablation of the dielectric layer followed by silver overprinting [Tse Nga Ng, Scientific Report 2, 585 (2012)]. Gold nanoparticles (Au NPs) are extensively used as floating gate in printed memory transistors, but poor Au-to-dielectrics interfaces made retention time limited to below 1 year. Si-SiO₂ core-shell NPs demonstrated significantly improved durability, with retention time up to 10 years.

Organic/inorganic nanocomposite films based on functional metal or metal oxide nanoparticles (NPs) have attracted considerable attention due to their potential applications. Even though a variety of approaches to the fabrication of nanocomposite films have been suggested, the layer-by-layer (LbL) assembly method is potentially the most versatile and offers various opportunities for the preparation of organic/inorganic NP films.
Strong point of this method is that it enables the preparation on substrates of nanocomposite films with a tailored film thickness, chemical composition, functionality, and internal structure. In addition, a variety of functional materials can be inserted within LbL films through complementary interactions in polar solvents (mainly aqueous media). Recent progress in LbL assembly has allowed the successive adsorption of functional components in nonpolar solvents by covalent bonding.
Herein, we introduce a general and facile approach for the preparation of LbL-assembled multilayers with a high packing density of well-defined NPs. Our methodology is based on the photo-crosslinking LbL assembly between 1-hydroxycyclohexyl phenyl ketone (HPK) as a photoinitiator (PI) molecule and OA-stabilized NPs (OA-Ag, OA-FePt, OA-MnO, and OA-Fe₃O₄). The repetitive processes of photo-crosslinking and spin-coating lead to formation of a crosslinked and highly packed NP layer without the additional surface modification required of pristine inorganic NPs for complementary interactions.
Our current approach, which is based on a photo-crosslinking reaction between PI molecules and OA ligands, can form homogeneously distributed NPs within films and can therefore be effectively used for electronic applications, such as the fabrication of nonvolatile memory devices. For demonstrating this possibility, the multilayer films composed of OA-Fe₃O₄ NPs were prepared onto Pt-coated substrates using the photo-crosslinking and spin-LbL assembly method, and then tungsten tip as a top electrode was contacted directly onto (crosslinked Fe₃O₄ NP)_n multilayer films to measure the electrical properties. When an external bias was applied to the 6-layered devices, a switching phenomenon depending on the voltage polarity was observed at low operating voltages (RESET at -1.8 V and SET voltage at +1.5 V), fast switching speed in nanosecond level, and ON/OFF current ratio of ~ 10³. Particularly, it is demonstrated that the ON/OFF current ratio of devices increases from 10¹ to 10⁴ with increasing the film thickness from 20 to 80 nm although one Fe₃O₄ NP of about 6 nm size can be operated as a nanoscale-memory device.
We believe that our approach can provide a basis for exploiting and designing a variety of organic/inorganic nanocomposite films with tailored functionalities as well as nonvolatile memory devices because inorganic NPs with compositions that range from metal to transition metal oxide can be easily incorporated into LbL multilayer films.

In recent years, emerging nonvolatile memories such as resistive random access memories (ReRAM) have attracted significant attention as next generation non-volatile memories. However, the physical understandings of ON-OFF switching mechanism of such emerging memories are still insufficient especially from atomistic and electronic viewpoint. It is well-known that the formation and disruption of O vacancy filament is relevant to ON-OFF switching [1]. However, the triggers of the above structural changes have not been clarified yet. In this presentation, we perform quantum mechanical discussions on ON-OFF switching mechanism of oxide-based ReRAM by using ab initio calculations.
We discuss the charge injection effects into oxide based ReRAM. The most stable charged state of isolated V_O is doubly positive in almost all range of Fermi level in TiO₂, HfO₂ and Al₂O₃. Moreover, isolated V_O is structurally more favorable than filament states when V_O is doubly positive. After injecting electrons, however, the situation changes drastically. Whereas, filament structure becomes more favorable when V_O becomes singly positive and neutral after electron injection. This drastic structural change upon electron injection is can be explained as follows. The existence of electrons enables the formation of bonding states between V_Os, which promotes the filament formation. As a result, carrier injection/removal induces cohesion-isolation phase transition in oxide based ReRAM, which results in the ON-OFF switching and improve P/E cycles endurance [2-5].
As a result, we have found that charge injection/removal can play crucial role on structural change from high-resistivity-state (HRS) to low-resistivity-state (LRS) for both ReRAM [2-5].
Moreover, carrier injection generally plays crucial roles on device operation through inducing atomistic and electronic structures of memory devices.
[1] D.-H. Kwon et al., Nat. Nanotechnol. 5, (2010) 148.
[2] K. Kamiya et al., Appl. Phys. Lett. 100 (2012) 073502.
[3] K. Kamiya et al., Tech. Dig., of 2012 IEDM (2012).
[4] M. Y. Yang et al., Jpn. J. Appl. Phys., 52 (2013) 04CD11.
[5] K. Kamiya, et al., Phys. Rev. B, 87, (2013) 155201.

The energetics of atomic processes in oxide RRAM operation are calculated by first principles for four typical oxides, HfO₂, TiO₂, Ta₂O₅ and Al₂O₃, in order to develop a deeper understanding of conductive filament oxide RRAM and to help in materials selection. The defect formation energies in the O-poor limit show that O vacancies are the dominant defect, and a band diagram is useful to define the operating regime of Fermi energy and O chemical potential. For Ta₂O₅ the O vacancy is accompanied by an unusual lattice rearrangement related to its adaptive structure, and this allows its easy migration. The high endurance of Ta₂O₅ RRAM and its favorability might be based on the greater amorphous character of Ta2O5 and its adaptive structure.
1. Y Guo, J Robertson, APL 104 112906 (2014)

In the last years, resistive switching has been reported for various classes of materials ranging from sulfides to binary oxides over to complex perovskites and is promising to replace transistors. Among those the most extensively studied switching oxides are already processed in today&’s semiconductor industry as gate oxides like SrTiO_3-δ, SiO₂, TiO_2-δ, Ta₂O_5-δ or HfO_2-δ. Despite their promises oxide-based resistive switches are rarely connected in their oxide diffusion kinetics and constants to the memristive device performance characteristics under bias. In particular, models to describe the mixed anionic-electronic defect contributions for two-carrier systems are missing; this difficults the material selection criteria for best performing devices beyond classic gate oxide selection. Firstly, we review recent methods to probe carrier diffusion characteristics and memristance for mixed anionic-electronic resistive switches and their oxide materials. Secondly, we report on the use of complimentary tools such as chronoamperomatry to classic pulse and cyclic voltametry characterisaiton of resistive switches to analyse via the Memristor-based Cotrell analysis diffusion constants and kinetics for mixed anionic-electronic switches (1). For this, we fabricated 2-terminal Pt|SrTiO_3-δ|Pt cross-bar array structures as a model system in terms of its mixed defects which show stable and reproducible resistive switching. Here, the implications on the memory resistances' ON and OFF states, threshold switching bias and field strength vs. the mixed anionic electronic carrier transport are presented. Thirdly, new material engineering of oxides are discussed to control resistive switching device properties like retention, R_on/R_off ratios and power consumption by "interfacial strain engineering of mixed conducting oxide" (2). Lattice strain engineering using heterostructures at internal interfaces can be used to tune material properties, like conductivity, far beyond the change accessible by doping. The material system Gd_0.1Ce_0.9O_2-x/Er₂O₃ was investigated by changing the number of interfaces from 1 to 60 while keeping the device at a constant thickness for a resistive switching assembly (2). Electrical measurements showed that the activation energy of the devices could be altered by Δ0.31 eV by changing the compressive strain of a micro-dot ceria-phase by 1.16%. Reproducible hysteretic I/V profiles with suitable R_on/R_off ratios are observable for the strained multilayer heterostructure samples.
Both examples implicate new material design and selection routes to tune the anionic-electronic transport in resistive switches by either knowledge on their diffusion kinetic insights and novel analysis routes or new interfacial strain engineering routes to alter transport in the memory.
References: (1) F. Messerschmitt et al., ACS Nano, (2014) in review (2) S. Schweiger et al., ACS Nano, 8(4) (2014), pp 5032-5048

Resistive switching memory (RRAM) is receiving strong interest as a promising memory technology alternative to conventional Si-based Flash and DRAM concepts. The main advantage of RRAM is its 2-terminal structure, which allows a compact design of the memory array according to the crossbar architecture. Other favourable properties include fast switching, scalable operation current, non-volatile behavior, extended cycling endurance, and integration in the back-end of line (BEOL) process which makes RRAM an ideal technology for embedded applications and future highly-scaled 3D storage technology.
Although interesting from the scientific and technological viewpoints, the potential of RRAM for commercialization strongly depends on the scaling perspective. RRAM scaling must be demonstrated not only at the level of device size, but also in terms of operation current, which must be minimized to prevent excessive voltage drop across the interconnect of ultra-high-density arrays. While the functionality of single RRAM has been demonstrated at the scale of 10 nm device size, the capability to reliably operate at the scale of 10 mu;A and below have not been demonstrated yet.
This talk will address the operation of RRAM at low current, demonstrating sub-10 mu;A operation of HfO_x-based RRAM and discussing the reliability implication of low-current switching. Current scaling of RRAM will be shown to be mainly limited by the stochastic switching and conduction taking place in small filaments obtained at low operating current. In fact, the statistical variation of RRAM switching (also known as program noise) increases at decreasing current due to the migration of few defects in the atomic-sized filament. Variability of both the set and reset states are discussed at both the experimental and theoretical levels, with the aid of a Monte Carlo model for set/reset operations by discrete defect migration. The read noise is then addressed, showing that conductive filaments obtained at low operating currents can be affected by the bistable switching of individual defects, which thus leads to large variation in the read current. The universal size dependence of read noise in several material systems is discussed based on numerical simulations of conduction in localized filaments. Finally, the talk will address possible methods to improve the scalability of RRAM, including program algorithms and material engineering to enlarge the resistance window, or novel multilevel approaches to exploit the high-level functionality of RRAM for storing more bits within the same physical cell.

Nervous pulses include peaks of ionic current through ionic channels in the neuron membrane. The conformational packed structure closing the channel is relaxed and changes, under influence of the electrochemical potential gradient across the channel, to an open conformational state allowing the flow of the ionic current peak. Most of the artificial polymers are electroactive, changing the chains conformational structure under influence of electric fields or currents. Conducting polymers respond in liquid electrolytes to the flow anodic currents with extraction of electrons from chains, formation of flat (changing conformations) polaronic (radical-cation) structures involving several monomeric units and requiring the penetration of anions and water form the solution for charge and osmotic balance inside the gel membrane electrode. The film swells during oxidation and shrinks, closes and packs its conformational structure by reduction. When rising packed conformational structures, attained by reduction at rising cathodic potentials for the same reduction time, are used as initial states for the gel membrane oxidation (by potential step to the same anodic potential) ionic current peaks, similar to ionic channels peaks, are obtained: the maximum shifts to higher times for rising conformational packed initial states. The activation energy of the reaction is constant (as expected for any chemical reaction) when open conformational structures are used as initial states for the reaction. For rising packed initial conformations a linear increase of the oxidation activation energy is attained. The reaction induces conformational movements, ionic and aqueous flow requiring the constant chemical activation energy and the conformational energy. This conformational energy is a memory energetic state defined by packed conformations, trapped counterions and solvent: hundred of different energetic states (memory values) can be stored under total control by the conformational states. The easiest way to read and erase the memory is by the ionic peak during oxidation. Alternative and non-destructive ways are magnetic, optical or analytical determination (reading) of ion-trapped or conformational packed state. Any intra-chain crosslinking originates a permanent memory with a permanent change on the current peak. New multivalent (hundred of values) chemo-ionic-conformational memories (erasable or permanent) can be explored bearing both, electrical and chemical information simultaneously. They can be used as models for some similar information storage in brain originating brain memory.
Acknowledgments: Authors acknowledge financial support from Spanish Government (MCI) Project MAT2011-24973, Jose G. Martinez acknowledges to the Spanish Education Ministry for a FPU grant (AP2010-3460).
Reference
[1] TF Otero, JG Martinez. Structural and biomimetic chemical kinetics: Kinetic magnitudes include structural information. Adv.Funct. Mater. 23, 404-416 (2013)

Resistive random access memory (ReRAM), which has also been labeled resistively switching devices or memristors, is a form of non-volatile memory that has been explored as a possible replacement technology for FLASH memory and also for novel logic implementations. Relatively few studies have demonstrated ReRAM in a fully CMOS-compatible fabrication process that is amenable to high volume manufacturing. Here, we describe the fabrication and testing of nanoscale hafnium oxide-based ReRAM elements in a back end of the line (BEOL) process on a 300 mm wafer platform. Using this approach, we fabricated 1) individual sub-100 nm ReRAM, 2) high-density arrays of 100 nm crossbar ReRAM, 3) vertically-integrated 1 transistor/1 ReRAM (1T1R) hybrid devices, and 4) a fully reconfigurable XOR gate with two ReRAM inputs and one ReRAM output. CMOS transistor elements were fabricated using the IBM 65 nm 10LPe process flow, with the hafnium oxide ReRAM elements defined during the BEOL dual-damascene metallization process. ReRAM elements consisted of copper bottom electrode, hafnium oxide dielectric, and titanium nitride top electrode. ReRAM device yield was dependent on initial forming parameters, primarily through control of the maximum compliance current (1 mA). Average device switching parameters were V_form =3.71 V, V_set = 2.02 V, V_reset = -1.0 V, resistance ratio (R_off/R_on) = 1.61E5. Device size was a factor in determining switching behavior, with nanoscale devices (100-200 nm) having higher average forming voltage (10.2 V) and set voltage (2.3 V) than 1 micron devices (V_form = 6 V, V_set = 0.95 V). CMOS elements, including single transistors and XOR logic, performed within design specifications of the IBM 10 LPe process. The CMOS logic was not affected by the modification of the standard process flow to include the ReRAM layers. In addition, a descriptive HSPICE device model has been developed for individual ReRAM, as well as 1T1R and our hybrid ReRAM/CMOS reconfigurable XOR. This model is being used to simulate the behavior of more complex circuits, and to obtain estimates of power consumption and switching behavior with varying read/write/erase pulses.

This study demonstrates the fully transparent resistive random access memory (TRRAM) containing amorphous indium gallium zinc oxide (a-IGZO) as the resistive switching layer. The TRRAM device was prepared by radio-frequency magnetron sputtering to deposit 25-nm thick a-IGZO and 100-nm thick indium zinc oxide (IZO) layers in sequence on the indium tin oxide (ITO) glass substrate to form the IZO/a-IGZO/ITO capacitor structure. Optical measurement indicated that the transmittance of TRRAM device exceeds 85% in the visible-light wavelength range. Electrical measurements indicated the forming-free feature in all TRRAM samples prepared in this work. The best electrical performance was observed in the device subjected to a post annealing at 300°C for 1 hr in air ambient (V_set = 0.6 V, V_reset = 0.7 V, R_HRS/R_LRS (i.e., R-ratio) > 10³). For the reliability properties of devices, the cycleability test observed the R_ratio remained about 5'10² for 10⁴ switching cycles whereas the retention test found that R_HRS value drops for 8% while their R_LRS value remains stable after the test for 10⁴ sec. As revealed by the current-voltage measurement, the conduction mechanism of TRRAM device at low resistance state is the ohmic contact conduction while that at high resistance state changes to the space-charge-limited-current (SCLC) conduction. The improvement of electrical properties of TRRAM devices was ascribed to the post annealing at 300°C which effectively reduces the interfacial traps densities at the a-IGZO/ITO and IZO/a-IGZO interfaces as indicated by the capacitance-voltage measurement.

Crossbar arrays are the most promising architecture for a resistive random access memory (RRAM) device to achieve high-density memory with a minimum compact cell size of 4F², where F is the smallest feature size of an individual cell. Conventionally, a selection device such as diode or transistor is integrated in order to avoid cross-talk interference between adjacent cells which in turn increases area consumption as well as complexity in the fabrication process considerably. Here, a novel architecture based on the vertical structure of Metal-Dielectric-Graphene-Insulator-Metal (MDGIM) is proposed to realize the functionality of one transistor-one resistor (1T-1R) architecture while maintaining the high-density 4F² footprint. Transistor functionality is vertically integrated into the RRAM device by exploiting the workfunction tunability of graphene via external gate field to modulate the current flow across the memory cell. In this structure, Metal-Dielectric-Graphene (MDG) stack collectively functions as workfunction-tunable bottom electrode for Graphene-Insulator-Metal (GIM) RRAM device.
A proof-of concept MDGIM device is demonstrated based on the stack of ITO/ Al₂O₃/Graphene/ Aluminum tris (8-hydroxyquinolate) (Alq3)/Al. MDG stack is first prepared by transferring CVD grown monolayer graphene on 20 nm-thick Al₂O₃ film deposited on the pre-patterned ITO gate electrode on the glass substrate. MDGIM device is then completed by thermal deposition of Alq3 and Al top metal electrode via shadow mask. MDGIM device shows an electrical nonvolatile memory behavior including V_th of sim; 5 V, V_w (write) of sim; 6.5 V, and V_e (erase) of ~8 V. The I_on/I_off ratio is ~ 10⁵ at V_r (read) of 3 V. This is comparable to the electrical characteristics exhibited by typical MIM device based-on ITO/Alq3/Al structure. The transistor functionality of the MDGIM device is evaluated by measuring the drain current versus gate voltage (I_D-V_G) at both low resistance state (LRS) and high resistance state (HRS). In the LRS condition, the current at a fixed bias of 3V (V_r) can be modulated by ~10 over the gate bias range of ± 8 V. When the device is turned to HRS, the current flow across the device is extremely low (~1 nA at 3V) and hence no significant gate modulation is observed.
In contrast to conventional 1T-1R architecture, our proposed MDGIM structure not only has an ability to retain high-density cross-point arrays but also enables a simple implementation opening up new strategy to make low-temperature and low-cost flexible memory devices.

Resistive Random Access Memories (RRAM) based on transition metal oxide (TMO) capacitor structures, with metal top and bottom electrodes, have recently received much attention, as the next generation memory beyond FLASH. In the conventional RRAM devices, the main explanation proposed for the Metal Insulator Transition (MIT) responsible for the RRAM working principle, is based on the creation and destruction of oxygen vacancies-rich filaments created across the TMO layer. By contrast, the novel RRAM principle described in this report is based on quantum mechanical electron-electron correlation phenomena in TMOs. In this respect, we have achieved a filament-free bulk effect in NiO-based capacitor strucutres with 10-60 nm thick NiO layer betwee Pt top and bottom electrodes, where the NiO layer is grown by atomic layer deposition (ALD). The uniqueness of theTMO NiO film synthesis process described here is that the ALD process results in the incorporation of carbonyl (CO) complexes in the NiO layer, which control the ionic state of the transition metal ion (e.g., Ni²⁺ in NiO). The unique chemical composition of the NiO material with carbonyl complexes leads to the novel resistive change memory concept named correlated electron random access memory (CeRAM), created to define this new RRAM principle. Extensive characterization of the transport properties in real devices, electrical performance, and XPS analysis of the Pt/NiO:CO/Pt capacitor structures with stored conductive, insulating and non-programed or virgin states have been performed to understand the chemical composition and ionic states of the transition metal, electron-electron correlations, switching phenomena and working principle of the CeRAM device.

In recent years, resistive-switching random access memory (ReRAM) has been recognized as one of the most promising next-generation memory technologies because of its simple structure, high scalability, and ease of operation. Of various types of ReRAM available, metal/insulator/metal structures composed of a thin metal-oxide layer sandwiched between an electrochemical active electrode (Ag or Cu) and an inert metal electrode are very attractive for practical applications, because metal oxides are highly compatible with the current complementary CMOS processes. From the similarity of the operation mechanism to an atomic switch, whose resistance of a nanometer gap between a mixed conductor electrode and an inert metal electrode is controlled by electrical bias [1], this MIM-structured cell is referred to a gapless-type atomic switch [2]. We have investigated the switching mechanisms of Cu(Ag)/Ta₂O₅/Pt atomic switch cells as a model system. The SET (from the ON state to the OFF state) and RESET (from the OFF state to the ON state) operations are attributed to the formation and dissolution of a metal filament between the electrodes, respectively [3,4].
Among the various properties of ReRAM operations, the switching speed (time) is one of the most important device parameters. Here, we evaluated the speed of the SET and RESET operations of Cu(Ag)/Ta₂O₅/Pt cells by transient current measurements under the application of a short voltage pulse. In order to minimize the broadening and ringing of voltage pulses arising from impedance mismatching in the whole measurement system, the cell was integrated into a coplanar waveguide structure [5]. The SET time decreased exponentially with increasing pulse amplitude, reaching as low as 1 ns using moderate pulse voltages. From a comparison with atomistic nucleation theory, metal nucleation on the Pt electrode was found to be likely the rate-limiting process determining the SET time. On the other hand, the RESET time decreased with increasing the OFF resistance. The cell exhibited several ns for the OFF resistance of ~600 Omega;. The electrical power needed to RESET the cell is inversely proportional to the ON resistance. This suggests that the RESET operation might involve thermal effects to disrupt the metal filament formed.
The observed fast switching speeds indicate that oxide-based atomic switches hold potential for fast-switching memory applications.
[1] Terabe et al., Nature 433 (2005) 47, [2] Hasegawa et al., MRA Bull., 34 (2009) 929, [3] Tsuruoka et al., Nanotechnology 21 (2010) 425205, [4] Tsuruoka et al., Nanotechnology 22 (2011) 254013, [5] Tsuruoka et al., AIP Adv., 3 (2013) 032114.

The resistive switching behaviour in transition metal oxide, HfO₂, has been widely investigated for Resistive Random Access Memory (RRAM) applications [1]. However faster set/reset at lower voltages/current as well as improved reliability, retention and variability are highly desirable characteristics which have motivated the further exploration of various techniques like composition modification by adding elements like Al [2][3]. However, only 1-2 samples (compositions) have been compared to show promising behaviour. This motivates a more detailed exploration of the Hf_xAl_1-xO_y system. The conventional sputtering techniques enable the evaluation of a few selected compositions in the wide composition space of Hf_xAl_1-xO_y. In this work, we propose the use of combinatorial sputtering for high-throughput materials screening for RRAM applications and use the ternary system of Hf_xAl_1-xO_y as a model system.
We use the combinatorial sputter technique to simultaneously sputter HfO₂ and Al₂O₃ targets to obtain a film of Hf_xAl_1-xO_y with continuous composition gradient on a single wafer surface. The value of ‘x&’ varies from 0 to 1 for our experiments. First, we present a systematic study of dependence of material parameters like bandgap, refractive index, dielectric constant, conduction band and valence band offset etc. on the composition of Hf_xAl_1-xO_y. The well-characterized material is then used to study the effect of composition of Hf_xAl_1-xO_y on RRAM devices. The effect of oxide thickness scaling as well as electrodes material is also studied. As a baseline, individual pure oxides, HfO₂ and Al₂O₃, are used. The Al₂O₃ based RRAM devices are found to have larger memory window and lower current levels as compared to HfO₂ based RRAM devices. The role of composition, then, in controlling/altering the switching parameters like forming voltage, set/reset voltages and currents etc. and obtaining the optimum parameters for resistive switching is explored. Finally, the memory performance parameters i.e. resistance ratio, endurance, speed, retention, are used to further understand the effect of composition of Hf_xAl_1-xO_y on RRAM devices. Thus, a comprehensive study of effect of composition of Hf_xAl_1-xO_y on RRAM devices in presented. Such a high-throughput materials screening method .provides both excellent composition resolution and efficiency which is highly desirable for the exploration of ternary oxide systems which have a broad composition space.
References -
[1] Y. S. Chen et al. , " Challenges and Opportunities for HfO_x Based Resistive Random Access Memory", p.717, IEDM 2011.
[2] B. Gao et al., " Oxide-Based RRAM: Uniformity Improvement Using A New Material-Oriented Methodology ", Symposium on VLSI Technology Digest of Technical Papers, 2009.
[3] Y. S. Chen et al., " Well controlled multiple resistive switching states in the Al local
doped HfO2 resistive random access memory device", Journal of Applied Physics 113, 164507, 2013.

Germanium dioxide (GeO₂) is a promising material for next generation optoelectronic devices due to its high dielectric constants, high refractive index, high thermal stability and large resistance switching effect[1]. In particular, the large resistance switching effect makes it a candidate material for resistive random access memory (RRAM)[2]. It is well known that GeO₂ exists in three main crystallographic phases at ambient temperatures, i.e., an α-quartz like structure (trigonal, space group P3₁21 or P3₂21, α-GeO₂), a rutile like structure (tetragonal, space group P4₂/mnm, r-GeO₂), and an amorphous glassy state. The physicochemical and optoelectronic properties strongly depend on the polymorphs. For example, only the α-quartz like phase shows strong piezoelectric and electro-optic effects[3]. The polymorphs of GeO₂ are usually determined by XRD, FT-IR, and Raman spectroscopy, and in GeO₂ single crystal, electronic band structures, elastic constants and lattice parameters, have been well elucidated. On the other hand, characterization of polycrystalline GeO₂ thin films is not straightforward. For example, orientation of α-GeO₂ crystalline grains in polycrystalline films, which is important to discuss the piezoelectric and electro-optic properties, have not been studied.
In this paper, we demonstrate that second-harmonic generation (SHG) mapping microscopy is a very useful technique to investigate orientation of α-GeO₂ microcrystals in polycrystalline films. In this work, the test samples are GeO₂ films prepared by sputtering a Ge target in a mixed O₂/Ar atmosphere followed by annealing at 1000 ^oC. Formation of α-GeO₂ crystals is confirmed by XRD and XPS measurements. The SHG mapping microscopy reveals that the SHG intensity depends strongly on the measurement points and the films consist of domains with about several hundred micrometers. The each domain shows significantly different polarization dependence of SHG, indicating that the each domain possesses microcrystals with identical crystalline orientation. The orientation of the each domain can be quantitatively determined by analyzing polarization dependence of SHG. Our results suggest that polarized SHG mapping is useful to determine crystalline orientation of microcrystals in polycrystalline films, when the polycrystals are SHG-actieve. [1]Y. Kamata, Mater. Today 11, 30 (2008) [2]P. Hermet, et.al. J. Phys. Chem. C (2012), 116, 8692minus;8698 [3]A. Lignie,et.al. Inorg. Chem. (2011), 50, 9311-9317

We report on atomistic simulations of formation of a metallic filament and electron transport during the operation of copper/amorphous silicon dioxide electro-metallization cells of interest for non-volatile memory. We use molecular dynamics (MD) with reactive force fields and a modified charge equilibration method designed to model electrochemistry to simulate the operation of the device that involves the formation of a metallic filament that bridges between the electrodes. The effects of copper ions within the SiO₂ matrix on the electron transport and electronic structure
are studied using density functional theory with non-equilibrium Green&’s functional approach model electron transport and atomistic snapshots from the MD simulation. Our findings suggest a strong dependence of the conductance on the morphology of the metallic filament as it evolves with time. To provide insight into the reliability of conductive-bridging random-memory devices, we investigate the resistance states and data retention based on electron transport calculations during set and reset processes.

Titanium oxide is one of the most investigated resistive switching material and there are many reports on its bipolar or unipolar switching behaviour. Nevertheless, very little has been done on solution processable hybrids, in particular those based on titanium oxide nanorods. Here we demonstrate the resistive switching of functionalized titanium oxide nanorods films, which can be processed photolithographically. The material was prepared modifying an existing technique found in the literature which allowed the high yeld production of titanium oxide nanorods with an average diameter of 5 nm and length of 20 nm. Ligands of different types, including oleic-acid, phosphonic-acid and photocrosslinkable phosphonate terminated coumarin, were successfully used to functionalize the nanorods. The use of photocrosslinkable ligands is particularly attractive because it enables 1) the 3D integration of these organic memories and 2) the fabrication of devices based on stacks of such hybrid thin films allowing thus to further tune the properties of the devices (e.g. bilayer approach). The functionalized nanorods can be solution processed in several common solvents and spin coated producing uniform thin films with RMS surface roughness of the order of 1-2 nm. Crossbar metal-insulator-metal (MIM) devices were used in this work in order to investigate the switching properties of the hybrid materials. In those samples incorporating the crosslinkable material, ultraviolet light irradiation was used to make insoluble films prior to depositing the top electrode. Bipolar behaviour was observed in the spin-casted films and unipolar switching was obtained upon processing the samples in oxygen plasma or ozone. The devices show set/reset ratios of 100-1000 and high stability under repeated bias sweeps. Switching fields as low as 0.25 MV/cm are needed to set or reset the devices with the set to reset transition always taking place when a positive voltage is applied to the top electrode. A forming step is needed for the as-spin-casted material although appropriate processing steps may help achieve forming-free devices. The differences in the switching behaviour of devices based on 1) nanorods functionalized with different ligands, 2) nanorods with anatase or rutile crystalline phase and 3) stacks of hybrid titanium oxide films (bilayer approach) will be addressed and discussed. It should be stressed that the material preparation, device fabrication and measurements are all carried out in air showing the huge potential of this approach in the organic memory field.

Resistance switching random access memory (ReRAM) is a nonvolatile memory technology that is currently being heavily investigated. ReRAM employs a metal-insulator-metal configuration and depends on reversible resistivity changes in the insulator when bias voltages are applied to the metal-insulator-metal cell. HfO₂ is one candidate materials for the insulator layer. The crystallinity and oxygen vacancy content of the insulator layer plays a significant part in determining switch performance. Improvements in film crystallinity are typically accomplished with increased deposition temperatures or post-deposition annealing. Techniques that can produce smooth highly crystalline films at low processing temperatures would be advantageous for incorporation of HfO₂-based ReRAM on temperature-sensitive substrates. High power impulse magnetron sputtering (HiPIMS) can allow for enhanced crystallinity at lower deposition temperatures (< 200 ^oC) and has been show to produce Hf films with low surface roughnesses and dense morphologies [1]. In this study, the technique was extended to produce thin HfO₂ films with controlled crystallinity, density, and stoichiometry. Films were deposited with reactive pulsed DC magnetron sputtering and reactive HiPIMS using a hafnium target and an O₂/Ar sputtering gas mixture. The stoichiometry and chemical bonding states of the films were determined using in-situ x-ray photoelectron spectroscopy (XPS). The microstructure was analyzed using x-ray diffraction (XRD), atomic force microscopy (AFM), scanning electron microscopy (SEM), and transmission electron microscopy (TEM). The microstructure of the HiPIMS-deposited films was compared to that of films deposited with pulsed DC magnetron sputtering. Energy-resolved electrostatic quadraplole (EQP) mass spectrometry was used to measure the ion energies of the sputtered flux at the substrate.
[1] A.N. Reed, M.A. Lange, C. Muratore, J.E. Bultman, J.G. Jones, A.A. Voevodin “Pressure effects on HiPIMS deposition of hafnium films”, Surface and Coatings Technology, 206 (2012) 3795-3802.

Resistive switching devices based on redox reactions in electrochemical systems demonstrated the great potential as a disruptive technology for the semiconductor industry as of a number of applications such as memory, logic, analog circuits, neuromorphic applications and computing. These type devices fulfill the demands for low power consumption, high information density, fast read and write speeds, and non-volatility. The prospects for scalability almost approach the atomic level.
Numbers of detailed studies in recent years have revealed microscopic details on the kinetics of filament formation and charge transport including in situ, ex situ experimental analysis and modeling.
In this talk factors with significant influence at the nanoscale but being often underestimated or overlooked e.g. the activity and degradation of the interfaces and the phase (in)stabilities will be highlighted and critically discussed¹. The impact of the recently discovered nanobattery effect on the switching, endurance and the retention of RRAM devices will be demonstrated². It will be shown that both, retention and endurance, of RRAM devices are influenced by the nanobattery effect³. The shifts of state resistances and of switching voltages can be explained by the ion accumulation/depletion within the memory device. It is demonstrated that the retention of the OFF state and the multilevel switching and as well the switching voltage are strongly influenced by the emf which depends on the operating conditions. We therefore identify the nanobattery effect as a source for potential failure mechanisms both for device endurance and ON/OFF state retention.
A concept to suppress the interfacial effects by introduction of different barrier layers will be emphasized and discussed on the basis of resent results.
References:
1. Valov, I. Redox-Based Resistive Switching Memories (ReRAMs): Electrochemical Systems at the Atomic Scale. ChemElectroChem2014, 1, 26-36.
2. Valov, I.; Linn, E.; Tappertzhofen, S.; Schmelzer, S.; Hurk, J. v. d.; Lentz, F.; Waser, R. Nanobatteries in redox-based resistive switches require extension of memristor theory. Nature Communications2013, 4, 1771.
3. Tappertzhofen, S.; Linn, E.; Böttger, U.; Waser, R.; Valov, I. Nanobattery Effect in RRAMs - Implications on Device Stability and Endurance. IEEE Electron Device Lett.2014, 35, 208-210.

Resistive switching in TiO₂ has been studied extensively for resistive random access memory and other applications in nanoelectronics but nearly all of these studies have employed polycrystalline or amorphous TiO₂. We have used atomic layer deposition to grow single-crystal anatase TiO₂ thin films on Si (001) substrates, with single-crystal SrTiO₃ grown by molecular beam epitaxy serving as a buffer layer between the TiO₂ and the Si substrate. Resistive switching devices are then fabricated with the bottom electrode consisting of the SrTiO₃/Si substrate, and the top electrode formed by deposition of 5nm Ti followed by 160nm Au. Highly stable bipolar resistive switching and very linear current-voltage characteristics in the on (low-resistance) state are consistently observed, strongly resembling the electrical characteristics of electrochemical metallization memories. In these devices, deposition of Ti for the top electrode creates additional oxygen vacancies near the top of the TiO₂ layer during the electroforming process, facilitating the subsequent SET/RESET processes. Oxygen vacancies play a key role in the bipolar resistive switching processes observed. Detailed analysis of electrical behavior in these devices reveals that switching between the high-resistance and low-resistance states occurs via a valence-change mechanism in which extended defects composed of oxygen vacancies form a highly conductive filament during the device SET process, which then dissolves during the RESET process. Extremely high resistance ratios between the off (high-resistance) and on (low-resistance) states - as high as 10⁷ - are routinely observed, which we attribute to the highly insulating nature of the single-crystal TiO₂ layer. In addition, we observe that the on-state conductance can be controlled quite precisely and reproducibly via the compliance current imposed during the measurement, and assumes values that are integer multiples of G₀ = 2e²/h, the fundamental quantum of conductance for a single-mode ballistic conductor. At compliance currents of 10-200µA, on-state conductance ranges from G₀ to 4G₀ and can be controlled to within a single quantum of conductance by imposing a given compliance current during the device SET process. These results demonstrate substantial advantages of single-crystal TiO₂ as a material for resistive switching devices, and suggest a variety of avenues for integration into high-density memory arrays and elucidation of issues relevant to scaling potential.

Non-volatile memory is an essential element of modern electronic devices and embedded electronic systems. However, current flash memory is approaching integration limits and a range of emerging non-volatile memory technologies have been proposed as replacements¹. Among those, resistive random access memory (ReRAM) devices based on non-volatile resistive switching in transition metal oxides have attracted particular attention due to their scalability, lower power consumption, faster switching speeds, longer retention times, and simpler device structure ². However, ReRAM devices need suitable bi-directional selector elements to avoid sneak-path problems in cross-point arrays. Potential candidates for the selector element include materials that exhibit threshold switching due to a thermally-induced insulator-to-metal transition (IMT). For example, hybrid 1S1R (1 selector + 1 resistive memory) devices based on NbO_2-x/Nb2O_5-x heterostructures have been shown to meet many of the requirements for next generation nonvolatile memory arrays ³. In this case the NbO_2-x layer exhibits volatile threshold switching (transition temperature ~800^oC) and acts as the selector element and the Nb₂O_5-x layer exhibits nonvolatile resistive switching and acts as the memory element. Unfortunately, the operating current for these devices is too high for practical application and further work is required to address this issue..
In this study we investigate current confinement as a means of reducing the operating current of NbO_2-x selector elements. This is based on the premise that current concentration will reduce the current required to reach the insulator metal transition temperature. Two approaches are reported: the use of a textured bottom electrode in which current confinement occurs at electrode asperities and; the production of a nanoscale conductive filament in a resistively-switched ‘control&’ layer in which the current is confined to the filament. Specifically, this was achieved by: introducing a ‘rough&’ Pt bottom electrode (RMS roughness ~2.5 nm) or by inserting a 20-nm-thick dielectric ‘control&’ layer (Nb₂O₅ or HfO₂) between the bottom electrode and NbO_2-x threshold-switching layer and inducing hard breakdown to produce a permanent conductive filament. Using these approaches we show that the threshold current for the insulator-metal-transition (I-M-T) in micro-scale devices (~150 µm) can be reduced from 36 mA to ~20 µA. A comparison of the various approaches is reported and the results are discussed with reference to finite element simulations, including the expanding phase change region during the I-M transition.
Reference:
¹ J. Hutchby and M. Garner, in ERM Working Group Meeting, 2010), p. 6.
² H.-S. Wong, H.-Y. Lee, S. Yu, Y.-S. Chen, Y. Wu, P.-S. Chen, B. Lee, F. T. Chen, and M.-J. Tsai, Proceedings of the IEEE 100, 1951 (2012).
³ X. Liu, S. M. Sadaf, M. Son, J. Shin, J. Park, J. Lee, S. Park, and H. Hwang, Nanotechnology 22, 475702 (2011).

Redox-based Resistive Switches are a promising alternative to current memories and logics. Resistive switches are usually composed of a single metal oxide film, e.g. SrTiO₃, TiO₂ CeO₂, sandwiched between two metal electrodes. Despite proof-of-concepts new materials and concepts to alter carrier contributions at high field strength require attention. New concepts beyond classic doping of oxides are discussed to control device properties like retention, R_on/R_off ratios and power consumption. In this work, lattice strain engineering is being discussed as a new route for tuning material and device properties in metal oxide films through the manipulation of mass and charge transport. Lattice strain engineering using heterostructures is a versatile concept and is currently discussed for potential fuel cell applications but so far no micro-devices have been demonstrated. This concept of strain at internal interfaces in heterostructures can be used to tune material properties, like conductivity, far beyond the change accessible by doping. The benefits of strain manipulation are the biggest at low temperature, this makes it particularly interesting for Resistive switching memories. A novel microfabrication strategy was developed and applied in order to sandwich strained heterostructures between two electrodes. It is imperative to establish a fabrication route that allows placing the electrodes at close distances to operate switches at >> 10E6 V/m. The material system Gd_0.1Ce_0.9O_2-x/Er₂O₃ was investigated by changing the number of interfaces from 1 to 60 while keeping the device at a constant thickness.[1] Electrical measurements showed that the activation energy of the devices could be altered by Δ0.31 eV by changing the compressive strain of a micro-dot ceria-phase by 1.16%. The near-order ionic transport interaction is supported by Raman spectroscopy measurements, which are introduced as new measurement technique to investigate and describe the strain state with high spatial resolution. A strain activated volume tensor model was applied to describe the changes in migration energy. Reproducible hysteretic I/V profiles with suitable Ron/Roff ratios are observable for the strained multilayer heterostructure samples for different material systems. First modulations of the device by strain engineering and characteristics of pulsed measurements are reported.
References:
[1] Schweiger et al., ACS Nano, 2014, 8 (5), pp 5032-5048

Resistance switching (RS) in metal/oxide/metal stack structures plays a key role of resistive random access memory (ReRAM). Although the formation and rupture of conductive filaments have been widely accepted as an origin of RS in binary transition metal oxides, the conduction mechanism especially in High Resistance State (HRS) is not completely clarified. In the study, the temperature dependencies of DC and AC conductances in the Initial state, HRS, and Low Resistance State (LRS) of Pt/NiO/Pt stack structures have been investigated. The dominant conduction component was estimated to be band conduction process even in the HRS.
NiO films were deposited on Pt/Ti/SiO₂/Si substrates by a reactive RF sputtering method. The O₂ flow rate and the substrate temperature were about 1.1 sccm and 723 K, respectively. The thickness of NiO films was 80-90 nm. Pt top electrodes with a thickness of 50 nm were deposited by electron beam evaporation. The DC and AC conductance measurements were performed in the temperature range from 77 K to 370 K. The AC conductance was measured in the frequency range from 40 Hz to 4 MHz with AC amplitude of 50 mV under zero bias.
From the temperature dependence of the DC conductance, the resistances in the HRS (R_HRS) above 170 K show the similar tendency to that in the Initial state (R_Ini) with an activation energy of about 300 meV. This result revealed that the R_HRS was dominated by the bulk resistance excluding conductive filaments above 170 K [1]. The band conduction can originate from holes thermally excited from the localized levels above 170 K. On the other hand, the R_HRS below 170 K was smaller than the R_Ini by two figures or more. In the lower temperature range than 170 K, the resistance of filaments and their ruptured region was much smaller than the residual bulk resistance.
In the Initial state, the AC conductance was proportional to frequency to the power of exponent s (0.6-0.9) below 170 K. The temperature coefficient of s was negative, indicating that carrier relaxation process can be explained with the Correlated Barrier Hopping (CBH) model [2]. The barrier height between a pair of localized defect sites was considered to be 3 meV, as estimated from the activation energy of the DC conductance. On the other hand, the AC conductance in the HRS below 170 K was separated into frequency-dependent and frequency-independent components at the lower frequency. Because the latter component is due to band conduction process, conduction characteristics of filaments are dominant even in the HRS below 170 K. The AC conductance in the LRS was almost independent of frequency.
From the results above, the difference of resistance in both HRS and LRS can be explained by the difference of oxygen-vacancy density distributed in filaments. The details of conduction mechanism in each resistance state will be presented.
[1] K. Kinoshita et.al., J. Mater. Res., 23, 812 (2008).
[2] S. R. Elliott, Adv. Phys., 36, 135 (1987).

The squeezing of information processing power into ever decreasing form factor has not only led to higher levels of functionality in mass-market electronics but also to smaller and lighter mobile devices, such as smartphones and tablet computers. It has also opened-up hitherto unimagined systems applications such as the “Internet of Things” (IoT). These applications demand low energy operation, particularly in pocketable devices or distributed agents (e.g., wireless sensors) that operate on severely limited battery capacity. Since memory and storage account for a significant part of an untethered mobile information processing and/or communications system, it is clear that memory technology must not only be highly compact but also must function at extremely low energy. This means that storage elements have to be compatible with circuit voltages of less than one volt and operating currents below a few tens of microamps. They must also be embeddable with logic components to allow design flexibility and optimum performance, while reducing the system bill of materials. Unfortunately, the modern electronics market tends to be burdened with significant cost sensitivity and so memory technologies should be manufactured with as few critical processing steps as possible and with reduced peripheral circuit overhead to minimize chip area. One memory that has risen to prominence in the context of low power electronics is Conductive Bridging Random Access Memory (CBRAM®), in which information is represented by two or more resistance states. These particular resistance-change devices have a solid electrolyte placed between inert and oxidizable electrodes to enable a metal ion current to flow. This ionic current feeds a reduction reaction, resulting in the formation of a nanoscale metallic filament within the electrolyte which is responsible for the resistance change effect. This paper will discuss the materials and operational characteristics of CBRAM® devices and arrays and will demonstrate, by way of examples from academia and industry, why this technology has entered commercialization and is ideal for future generations of low energy electronic systems. In addition, the paper will also present recent results from radiation exposure studies, which show the devices to be highly radiation tolerant and therefore suitable for use in medical devices, as well as military and aerospace applications.

Rare-earth oxides have attracted considerable research interest in resistance random access memories (ReRAMs) due to their compatibility with complementary metal-oxide semiconductor (CMOS) process. To this end we report unipolar resistive switching in a novel ternary rare-earth oxide LaHoO₃ (LHO) to accelerate the progress and to support the advances in this emerging densely scalable research architecture. Amorphous thin films of LHO were fabricated on Pt/TiO₂/SiO₂/Si substrate by pulsed laser deposition, followed by sputter deposition of platinum top electrode through shadow mask in order to elucidate the resistive switching behaviour of the resulting Pt/LHO/Pt metal-insulator-metal (MIM) device structure. X-ray photoelectron spectroscopic analysis indicated the coexistence of oxygen vacancies and metallic Ho in the as prepared LHO thin films. Stable unipolar resistive switching characteristics with interesting switching parameters like, high resistance ratio of about 10⁵ between high resistance state (HRS) and low resistance state (LRS), non-overlapping switching voltages with narrow dispersion, and very good retention and endurance features were observed in these heterostructures. To understand the switching mechanism, investigations on temperature dependency of resistance in both LRS and HRS logic states have been carried out. The increasing resistance value of LRS with temperature suggested the formation of metallic Ho filaments in LRS whereas in HRS the resistance was found to decrease with increasing temperature possibly due to the rupture of conducting filaments as a result of joule-heating effect thereby confirming the insulating or semi-conducting behaviour of the film in HRS. Hence, the observed resistive switching in LHO was explained by the formation/rupture of conductive filaments formed out of oxygen vacancies and metallic Ho atom. Form the current-voltage characteristics of Pt/LHO/Pt structure, the conduction mechanism in LRS and low voltage region of HRS was found to be dominated by Ohm&’s law whereas at the high voltage of HRS the conduction mechanism followed poole-frenkel emission. The observed reproducible and non-volatile resistive switching, high contrast in ON/OFF resistance ratio, and amorphous structure make LHO as a promising material for the non-volatile ReRAM devices.

Redox based resistive switching memories are attracting great attention being the potential next generation of memories owing to their low power consumption, fast non-linear switching kinetics and options for scalability to atomic level. Redox based resistive memories are classified as thermochemical (TCM), valence change (VCM) or electrochemical metallization cells (ECM). The last two mentioned are of common interest because of the advantageous bipolar type switching.
However, present devices still lack of reliable switching behavior and retention. Both are caused by chemical instabilities of the cell&’s materials and/or the existence of electromotive forces counteracting and destabilizing ON- or OFF states. Hence, graphene is thought to be an ideal candidate as interlayer between electrode and electrolyte at both sides of the cell. On one hand it is expected to suppress undesired diffusion and therefore hinder chemical degradation. On the other hand, the chemical potential between the electrodes can be lowered. Hence, improvement of the retention is expected.
In this study, we present the influence of graphene as intermediate layer in Cu/SiO₂/Pt cells known as well investigated example for electrochemical metallization cells. As representative for a VCM cell Ta/Ta₂O₅/Pt is chosen, because it is a possible candidate for industrial applications.
The cells are characterized with cyclic voltammetry, I-V-sweeps and pulse measurements, subsequently being compared to their equivalents without any graphene barrier layer. The studies allow to conclude on the chemical and physical effectiveness of graphene as intermediate layer in ReRAMs.

Recently, oxides-based resistive switching devices have caught a lot of attention as a new class of non-volatile Resistive Random Access Memories (ReRAM) and memristors^1,2 being an alternative to classic transistors. Hysteretic and non-volatile current-voltage (I-V) characteristics allow modulations between high and low resistance states with achievable fast ns-switching speed and high scalability at low energy consumption. Among the materials showing resistive switching, mixed conducting anionic-electronic perovskite oxides operate on oxygen vacancies and electrons/holes for dynamic switching between resistance states: The electronic-ionic defect interaction and interphase effects control the switching process. Despite the promise of new materials, atomistic models on the charge carrier characteristic and kinetics as well as the thermodynamic stability relative to the resistive states, microstructures, and local field strength require attention. In this study, strontium titanate (SrTiO_3-δ), a well-known model system for defect chemistry,^3,4 was chosen as active oxide material with anionic-electronic transport to investigate fundamentals of the switching process. This is realized by a twofold approach: studying the role of bulk vs. grain boundaries in SrTiO_3-δ (e.g. comparing epitaxial (100)-oriented vs. polycrystalline thin films), and by investigating the role of varying electrode materials (e.g. different metals, electronic- and mixed conducting oxides). Thus, changes of the Schottky barrier and of oxygen exchange of SrTiO_3-δ with/via the electrodes are accessible. Electrical characterization was performed by recording hysteretic current-voltage profiles, electrochemical impedance spectroscopy and chronoamperometry which allows investigating fundamental properties such as drift/diffusion or threshold switching biases as recently reported.⁵ On the µm-scale, micropatterned electrodes were contacted and measured in a microprobe-setup for studies. Decreasing to the nm-range, c-AFM techniques were used which allow for electrochemical characterization in extremely confined sample volumes. That way, it was possible to study size effects relative to microstrucure e.g. for I-V curves recorded on the same thin films and to discuss defect models for memristance.
References:
1 Strukov D. B., Snider G. S., Stewart D. R. & Williams R. S. Nature453, 80-83 (2008).
2 Waser R., Dittmann, R., Staikov, G. & Szot K. Adv Mater21, 2632 (2009).
3 Merkle R., Maier J. Angewandte Chemie International Edition47, 3874-3894 (2008).
4 Rothschild A., Menesklou W., Tuller H. L., Ivers-Tiffée E. Chem Mater18, 3651-3659 (2006).
5 Messerschmitt F., Kubicek M., Schweiger S., Rupp J. L. M. Memristor Kinetics and Diffusion Characteristics for Mixed Anionic Electronic SrTiO_3-δ Bits: The Memristor-based Cottrell Analysis Connecting Material to Device Performance. Submitted to ACS Nano (2014).

We demonstrate a redox-based resistive switch exploiting the formation of conductive filaments in a bulk silicon-rich silicon oxide. Resistive switching is intrinsic to silicon oxide layer and does not depend on the diffusion of metallic ions to form conductive filaments.
Devices exhibit multi-level switching and analogue modulation of resistance as well as standard two-level switching. We demonstrate both operational modes (bipolar and unipolar switching modes) that make it possible to dynamically adjust device properties, in particular two highly desirable properties: non-linearity in I-V curves and self-rectification.
Scanning tunnelling microscopy (STM), atomic force microscopy (AFM), and conductive atomic force microscopy (C-AFM) measurements provide a more detailed insight into both the location and the dimensions of the conductive filaments. In addition, we report on the material changes leading to resistive switching using secondary ion mass spectroscopy (SIMS) and x-ray photoelectron spectroscopy (XPS).
We discuss aspects of conduction and switching mechanisms and we propose a physical model of resistive switching. We demonstrate room temperature quantisation of conductance in silicon oxide resistive switches, implying ballistic transport of electrons through a quantum constriction, associated with an individual silicon filament in the SiOx bulk. A stochastic method is developed to simulate microscopic formation and rupture of conductive filaments inside an oxide matrix. We use the model to discuss switching properties - endurance and switching uniformity.

Two-terminal resistive switching devices with continuously tunable resistance states are a promising platform for the realization of novel computing paradigms and multi-state memories that can be downscaled to nanometer dimensions. A pervasive roadblock for this technology is the lack of reproducibility. From this point of view, particularly promising is resistive switching in metal/oxide semiconductor systems with well-defined interfaces, such as the Schottky junctions between high work function metals and doped SrTiO₃.
In this presentation, a systematic study [1] on resistive switching as a function of metallization quality will be discussed. Resistance modulation was found to be nearly absent in epitaxial Pt(001)/Nb:SrTiO₃ junctions grown by high-temperature sputtering. Their ideality factor n = 1.19 is by far the lowest ever reported for such junctions at high doping (10²⁰ cm^-3). Large resistive switching on/off ratios of greater than 10⁵ was observed when the Pt and interface quality was intentionally degraded by lowering the growth temperature, removing the in-situ pre-growth anneal, and/or using highly energetic e-beam evaporation deposition.
Based on systematic analysis of current-voltage and capacitance-voltage behavior, we demonstrate that the emergence of resistive switching is related to the presence of unintentional interface layers in low quality junctions. We show that voltage-induced modulation of the Schottky barrier height is linked to charge trapping in the interface layer and its thickness governs the magnitude of the switching effect. Reproducible control of such unintentional interface layers is challenging, which readily explains the ubiquitous large scattering of resistive switching parameters in this and similar material systems.
The ability to suppress unintentional contributions to resistive switching in high-quality Schottky junctions demonstrated here opens new routes for engineering reliable switching, based on insertion of intentional defects into high-quality interfaces. We show that the resistive switching behavior in high-quality Pt(001)/SrTiO₃ junctions can be obtained by insertion of intentionally off-stoichiometric SrTiO₃ layers, grown by molecular beam epitaxy (MBE). A systematic study for a wide range of cation stoichiometries (Ti/Sr = 0.74 to 1.74) demonstrates the recovery of stable resistive switching in Sr-rich films, with an on/off ratio near 2. This is a first demonstration of resistive switching induced by the introduction of intentional defects into a high-quality material system.
[1] E. Mikheev, B. D. Hoskins, D. B. Strukov, and S. Stemmer, Nat. Commun. 5, 3990 (2014).

Resistive switching random access memory (ReRAM) is one of the most promising candidates for next generation nonvolatile memory due to simple structure (metal/insulator/metal), fast operation speed, high endurance and so on. The most common method of depositing insulator film is by sputtering. However, the sputtering process may cause some defects, which will affect the electrical behavior. To investigate this phenomenon, we try to use reactive sputtering process to deposit TiON film as insulating layer with Ti target in the atmosphere of mixing oxygen, nitrogen, and argon gas. The TiON film is deposited on TiN as bottom electrode and we deposited Pt as top electrode with sputtering and patterned by hard mask. We fixed the same thickness of TiON about 50nm and changed the deposition times of each device. For example, we deposit TiON with only one time which means it is without breaking the plasma and the other is deposited with six times which means we broke the plasma for six times forming six layers. By electrical measurement, we find out the some difference between these two kinds of devices. First, the uniformity of initial resistive state is different, the six layer device show high resistance and high uniformity. We tried three different O and N concentration to check this phenomenon and it showed the same trend. Furthermore, we discovered diode behavior in the device with six layers and it can be operated steadily within the threshold voltage. The more interesting thing is the diode behavior can be transformed into memristor by a forming process. This memristor can also be well operated with on/off ratio 10² and endurance over 100 times. For further discussion, we collected statics comparison among these two type device such as forming voltage, device yield and diode property. In six layer device with higher initial resistance state, it need higher forming voltage for conducting filament formation and the yield can achieve almost 100%. Despite electrical measurement, we tried to use other measurements, such as PL and XPS, to discuss about this phenomenon. In PL spectrum, we find out the internal defect inside the six layer thin film and it may be the main reason for this behavior. This defect may trap the electron from transporting through the insulting layer and also change the band diagram. By this research, we can figure out what plasma will affect the film and furthermore, we may have chance to do 1D1R device homogeneously.

Conductive bridge random access memory (CBRAM) has been considering as one of next-generation memories because it has lots of advantages such as high density, high operation speed, simple structure and low power consumption. In this work, we present the electrical features of CuO layer, working as a solid electrolyte, where the TiN/CuO/Ag configuration with the pattern size of ranging 34 to 1921 nm. The CuO layer was deposited by RF magnetron sputtering on TiN bottom electrode patterned by the photo lithography process. The Ag electrode was deposited by a thermal evaporation. And then, the device was annealed at 500 ^oC in N₂ atmosphere. It was obtained that the electrical characteristics of proposed CBRAM device showed the set voltage of 0.75 ~ 0.85 V, the reset voltage of -1.5 V or less, high resistance state (HRS) current of 4.19 x 10^-7 ~ 1.03 x 10^-6 A, low resistance state (LRS) current of 9.34 x 10^-4 ~ 2.06 x 10^-4 A, endurance of 1.0 x 10⁴ cycles with a margin (I_on/off) of 1.27 x 10² and retention of 10⁵ sec with a margin of 3.63 x 10². Moreover, most of all the CBRAMs showed similar I-V characteristics and multi-level cells, regardless of the pattern size. In addition to, the multi-level resistance state was realized by varying the reset voltage from -0.75 to -1.5 V, resulting from the negative differential resistance (NDR) region at reverse bias. Each resistance state was 1.18 x 10⁵ Omega;, 9.62 x 10³ Omega; and 6.60 x 10² Omega; at 0.1 V. We present the mechanism of multi-level CuO-based CBRAM by analysis of the filament shape in CuO solid-electrolyte layer.
*This work was financially supported by the Industrial Strategic Technology Development Program(10039191, The Next Generation MLC PRAM, 3D ReRAM, Device, Materials and Micro Fabrication Technology Development) funded by the Ministry of Trade, Industry and Energy (MOTIE) and the Brain Korea 21 Plus, Republic of Korea.

Resistive memories using amorphous SiC (a-SiC) as the solid electrolyte material have been developed with a Cu/a-SiC/Au stack configuration. Excellent non-volatile switching characteristics have been observed. An extremely high ON/OFF current ratio in the order of 10⁹ has been observed corresponding to distinctive low and high resistance states, which is beneficial for future resistive memories applications with reliable state detection and simple periphery circuits[1]. The high resistivity is attributable to the near stoichiometric compositions of the a-SiC layer as demonstrated by x-ray photo-electron spectroscopy and fourier transform infrared spectroscopy results as well as the relatively low RF power (250 W) and high Ar pressure used during the sputtering deposition of a-SiC, leading to reduced defects in a-SiC. Detailed analysis of I-V switching characteristics in both switching modes suggests Cu metallic filament conduction at ON-state and a Schottky barrier limited conduction mechanism in the OFF states [2]. Nonpolar RMs which exhibit both unipolar and bipolar switching behaviours have been considered advantageous as they can expand application scopes. Asymmetric switching performances between positive bipolar and negative bipolar cycles as well as between positive unipolar and negative unipolar cycles are observed. [3]. In this presentation, we will further expand our analysis, showing the promising pulsed switching characteristics of this system, its dependency on switching voltage and pulse duration, and its cyclability.
[1] Amorphous SiC based non-volatile resistive memories with ultrahigh ON/OFF ratios
L Zhong, PA Reed, R Huang, CH de Groot, L Jiang Microelectronic Engineering 119, 61-64 (2014)
[2] Resistive switching of Cu/SiC/Au memory devices with a high ON/OFF ratio, L Zhong, PA Reed, R Huang, CH de Groot, L Jiang Solid-State Electronics 94, 98-102 (2014)
[3] Nonpolar resistive switching in Cu/SiC/Au non-volatile resistive memory devices
L Zhong, L Jiang, R Huang, CH de Groot, Applied Physics Letters 104 (9), 093507 (2014)

Resistance-change phenomena of metal oxide films are used in ReRAM and emerging Memristive devices. The underlying mechanism in these systems is believed to involve ion- and defect-mediated electronic transport.[1] This, in most cases, is characterized by inhomogeneous spatial distribution of current flow. Understanding the role of inhomogeneity in material-properties of large-area thin-film dielectrics is also necessary for reliability engineering of oxides in logic and memory technologies.[2] Advanced scanning probe microscopy (SPM) techniques have been demonstrated to be particularly useful for spatially resolving nanoscale electronic and ionic phenomena.[3]
Here we report the use of advanced SPM techniques to understand the microscopic mechanisms leading to dielectric breakdown in TiN/Al₂O₃ system. We observe unexpected memristive switching, in contrast to typical breakdown characteristics seen in macroscopic measurements. First-order reversal curves in current-voltage (FORC IV) showed reversible I-V characteristics due to electronic phenomena and irreversible ionic phenomena beyond a threshold voltage of 3V. Multivariate statistical analysis of the I-V curves indicates that there exist several mechanisms of switching/injection with different rates and their contributions to the total current behavior is different at different spatial locations. Also, on application of a voltage pulse, relaxation behavior - expected of ideal capacitors - was not observed.
In order to explain the switching behavior, we developed a phenomenological, memristive model taking into account both instantaneous and history-dependent bias variables. By hypothesizing that the resistance should depend on the instantaneous voltage-ramp-rate, dV/dt, in addition to q and Phi; - the time-integrals of current and voltage respectively - we came up with an ansatz for the memristance of the system. The assumed form of memristance is shown to reproduce, qualitatively, the observed I-V as well as I vs. t characteristics.
[1] J. J. Yang et al., Nature Nanotech, 8, 13 (2013)
[2] Vandelli, L. et al., IEDM 2011; Bersuker, G., et al., J. App. Phys. 110, 124518 (2011)
[3] E. Strelcov et al., Nano Lett. 13, 3455 (2013); Y. Kim et al., Scientific Reports 3, 2924 (2013); E. Strelcov et al., ACS Nano, ASAP Articles (2014)

Polycrystalline HfO2 is of interest as a dielectric layer in metal-oxide-metal resistance switch memory devices and variable resistors for a wide range of applications. Functionality of these devices depends upon transport of anions (oxygen vacancies) or metal cations (Cu, Ag, Ni) through the dielectric layer, which is likely to be dominated by the presence of channels of high transport mobility along grain boundaries. Thus, it is of great importance to identify the structure of low energy grain boundaries (those most likely to occur in polycrystalline thin films), and ionic transport rates along these boundaries. Previous electron microscopy investigations have identified a few specific grain boundary structures occurring in the Baddeleyite structure (the stable structure for monoclinic HfO2 and ZrO2 at room pressure and temperature) resulting from transformation twinning, deformation twinning, or growth of thin oxide films on a metal surface. These special boundaries presumably occur due to their lower energy with respect to other arbitrary boundaries. However, a systematic study of the interfacial energy of grain boundaries in the monoclinic HfO2 system has not been previously reported. To this end, we simulated the interfacial structure and calculated interfacial energy of relaxed symmetric tilt boundaries by molecular dynamics (MD) as implemented in LAMMPS, using the reactive COMB2 potentials for Hf/HfO2. We report grain boundary structures and interfacial energies for different symmetric tilt boundaries, including for those special boundaries previously observed in Baddeleyite structures and supported by near-coincidence site lattice (CSL) models, for low angle tilt boundaries as a function of tilt angle, and for a wide range of symmetric tilt angles across the (010) grain boundary plane, the mirror plane of symmetry in the monoclinic Baddeleyite lattice. In parallel, thin HfO2 films have been grown using atomic layer deposition (ALD). We demonstrate control over grain orientation based on deposition and annealing temperatures, varying from random orientation, to preferred orientation of (-111) parallel to the substrate surface. High resolution TEM observations are employed to investigate grain orientations and grain boundary structure, which will be compared against the results of MD simulation. Results from this investigation will be discussed in the context of ionic transport perpendicular to the film. Special attention will be paid to the character of grain boundaries perpendicular, or nearly perpendicular to the (-111) plane.

TRAM (Topological switching Random Access Memory) is a promising candidate for the next-generation large-scaled memory for BIG DATA. This memory is composed from superlattice film of [Sb₂Te₃/GeTe], and it is said that arrangements of GeTe are very important for switching. We carried out high resolution X-ray diffraction (XRD) measurements using synchrotron radiation source to clarify structures of TRAM films. We found out that the arrangements of the GeTe were different from film fabrication temperatures. Combining the XRD analysis and DFT calculations, with the GeTe arrangement of Ge-Te-Ge-Te the TRAM set to ground state and no switching was occurred. However, when the GeTe arrangement was Ge-Te-Te-Ge, which had LRS (low resistance state), switches with very low SET/RESET voltage were attained compared to that of conventional phase change RAM (PCRAM), for example using alloy of Ge₂Sb₂Te₅. This work was performed as “Ultra-Low Voltage Device Project" funded and supported by METI and NEDO. A part of the device processing was operated by AIST, Japan.

The nanoscale electro-reduction in a memristive oxide is a highly relevant field for future non-volatile memory materials. We demonstrate a chemical reduction on the nanometer scale in formed Au / Fe-doped SrTiO₃ / Nb-doped SrTiO₃ devices, induced by a combination of a large electrical potential gradient and Joule heating. Chemically sensitive photoemission electron microscopy in x-ray absorption mode (XPEEM) at both the Ti and Fe L_2,3-edges is used to identify the conducting filaments of the device after electroforming. Both B-site elements show clear evidence of localized reduction in nanoscaled regions induced by the electrical treatment. Correlation to structural features of the top electrode indicates a critical role of the three phase boundary (electrode-oxide-ambient) for the electro-chemical reduction. Furthermore, we demonstrate structural changes in the cation sublattice on the surface, which is a clear indication of the importance of the local temperature during the forming process.
Simulated temperature profiles confirm the essential role of Joule heating through localized currents for electro-reduction and morphology changes. We suggest that the phase-boundary between noble-metal electrode and oxide could play a major role for the removal of oxygen ions from the device.

In the search of new memory devices, conductive bridge random access memory (CBRAM) have been of particular interest due to their low power consumption, fast write/read capability, high endurance and scaling limits reaching nanometers. These devices consist of a metal-insulator-metal structure and switch between high and low resistivity states with the application of voltage due to the formation and dissolution of a metallic conductive bridge. Many aspects of CB cells operation have been experimentally investigated in the recent years including the kinetics/thermodynamics and the mechanism of the filament growing. However a direct observation of the filament is challenging therefore, there is a need of an atomic level description of the cell during operation at its miniaturization limit.
We present the first molecular dynamics (MD) simulations of switching in nanoscale devices based on Copper as the active electrode and amorphous silica (a-SiO₂) electrolyte. The interactions between atoms are described by the reactive force field ReaxFF and the charges are calculated self-consistently at each step of the simulation using a modified charge equilibration method designed to model electrochemistry.
The simulations predict the ultrafast switching observed in these nanoscale devices (~ 50 nm² in cross section). We find that single-atom-chain bridges often form during device operation but they are metastable with lifetimes below a nanosecond. We propose an atomic-level mechanistic understanding of the switching and provide insight into their ultimate scaling and performance. Finally this general method can be applied to a wide range of electrochemical systems including capacitor and nano-battery.

Bipolar RRAM based on Pr_0.7Ca_0.3MnO₃ (PCMO) has been investigated extensively [1]. PCMO based unipolar RRAM has been demonstrated [2]. We have recently demonstrated that the materials origin of unipolar vs. bipolar switching in PCMO is consistently correlated to crystallinity [3]. Unipolar switching is observed in amorphous PCMO films while bipolar switching observed in polycrystalline PCMO films. However, there are significant differences in RRAM performance in both bipolar and unipolar RS depending on processing conditions like deposition temperature (T_dep) and oxygen partial pressure (p_O2). For example, bipolar switching memory window as well as virgin resistance increases with reduction in p_O2 (e.g. 10^-2 to 10^-3 mbar) before the onset of unipolar switching at low pO2 (~1.3x10^-5mbar). In this abstract, we present the impact of both composition and film morphology (extent of crystallinity) on bipolar RRAM performance and reliability.
Thin films (~64nm thick) of PCMO processed under various conditions (deposited at various oxygen partial pressures by Pulsed Laser Deposition (PLD)) are investigated between Pt and W electrodes. We observe that PCMO deposited at higher O₂ partial pressure (1.3x10^-1mbar) and lower O₂ partial pressure (>1.3x10^-4mbar) show unipolar switching while intermediate O₂ partial pressure (1.3x10^-2-1.3x10^-3 mbar) shows bipolar characteristics. Raman and XPS characteristics are well correlated with electrical characteristics.
Despite the processing origins, the studied unipolar films yield similar Raman spectra while bipolar films display distinctly different Raman spectra consistent with literature [2]. This indicates that there are two different phonon modes. XPS spectra indicate compositional change in the films controlled by deposition temperature and pO₂. Thus, O₂ partial pressure and temperature during deposition can be used to engineer the crystallinity as well as compositional change in PCMO.
The bipolar PCMO films switching transient measurements with 10ns resolution shows excellent non-linearity in switching time vs. switching voltage (pulse width vs. pulse height) curve which is a critical requirement for fast switching and long retention.
REFERENCES:
[1] D.J. Seong et al, “Effect of oxygen migration and interface engineering on resistance switching behavior of reactive metal/polycrystalline Pr_0.7Ca_0.3MnO₃device for nonvolatile memory applications”, IEDM, pp. 5.4.1 5.4.4, 2009.
[2] S. L. Li et al, “Unipolar resistive switching in high-resistivity Pr_0.7Ca_0.3MnO₃ junctions”, Appl. Phys. A, 103, pp. 21-26, 2011.
[3] N. Panwar et al, “Thermal Budget Reduction for Back-end Compatibility and Control of Resistance Switching Mechanism (Unipolar to Bipolar) in Pr_1-xCa_xMnO₃ (PCMO) RRAM”, MRS Fall, mrsf12-1507-AA-09-27, Boston, 2013.

PZT thin films remain an important ferroelectric material in FeRAM due to a fairly low crystallization temperature and high remnant polarization. Electrical performance of FeRAM capacitors is governed by PZT crystalline structure. Normally PZT film has column structure with {111} and {100} preferable orientation.
Main trends in microstructure transformation associated with the lead content are reported e.g. in [1]. The main nucleation mechanism for the films with low or middle lead content is the direct nucleation of {111} perovskite (Pe) grains on {111} Pt. Volume nucleation proceeds with creation of small pyrochlore (Py) particles. Nucleation and growth rates of Pe grains are increased with the lead excess in the film. At a very high lead content in PZT films (x=30 - 50 mol. %), PbO crystals stimulate nucleation of {100} Pe grains due to a good lattice correlation. As a result of high growing rate and growing in {111} and {100} directions, the Pe grains become smaller and not all from them are growing through the whole film volume.
Different kinds of seeding layers may be used to stimulate nucleation process. Usually the lead titanate layer or the layer with high lead content is used to promote nucleation.
In this study we propose a different approach: two-step crystallization process based on low lead content seeding layer. Our motivation is to increase {111} texture and to avoid crystalline size decrease at the first step of crystallization and promote easy perovskite grain growth at the next one.
Samples with a combination of seed layers from solutions with 0 and 5 wt.% Pb excess and the main layers with 15 and 30 wt.% Pb excess are formed. It is shown that the seed layer from solutions with the low Pb content leads to improvement of polarization properties of PZT films. For example if the seed layer is formed from the solution with 5% Pb excess, and other layers are deposited from solution with 30% Pb excess, then residual polarization is increased by~ 30 %.
[1] AS Sigov, KA Vorotilov, OM Zhigalina. Ferroelectrics. 433(1), 146-157 (2012).

The trend of scaling down and improving functionality rises the need of understanding of the effects of size reduction and defects on properties at nanoscale is of vital importance. Within this context we have been exploiting the role of nanoporosity on local properties of ferroelectrics, such as PbTiO₃ thin films. Porosity, normally considered as a defect (or secondary phase) has usually a detrimental effect on the electrical macroscopic response. However, the presence of porosity can also be regarded as an asset, in terms of: i) density (light weight) and ii) functionality.
In this work, the role of nanoporosity in PbTiO₃ thin films is predicted by using a 3D Finite Element Method (FEM) model. FEM provides us information about the real local electric fields inside the system, in which the local entities are subjected to during of switching. In all simulations a top layer of air was considered, creating the possibility to introduce vertical air/ferroelectric interfaces in the porous ferroelectric system in such way that local electric fields are forced to orient in the switching direction (Oz). In other words, the local electric field distribution in ferroelectric thin films with vertical porosity is much favorable to switching than in dense thin films because, the porous thin films need lower voltage to be switched. Indeed, the local domains (bits of memory) written in various positions are more stable in time in this kind of porous ferroelectric thin films because are separated by pores (no dipole-dipole interactions and no crosstalk).
These very interesting predictions were checked by experimental observations. Using Vertical Piezoresponse Force Microscopy (VPFM) and Switching Spectroscopy (SSPFM) the local ferroelectric properties of dense and nanoporous sol gel based PbTiO₃ thin films [1] were assessed. These experiments show that porous thin films present enhanced local ferroelectric properties (high local piezoelectric response and lower coercive field). In addition crystallization and formation of tetragonal ferroelectric phase seems to be favored by the presence of pores. Thus, our experimental results concerning the porosity influence on ferroelectric properties are in good agreement with the results obtained by 3D Finite Element Method model.
The impact of these results lies on the fact that nanoporosity can then be used as an elegant tool to tailor the coercivity of the ferroelectric response of thin films.
Acknowledgements
The authors thank FCT and FEDER (QREN - COMPETE) for funding FCOMP-01-0124-FEDER-037271 (PEst-C/CTM/LA0011/2013), the project PTDC/CTM/098130/2008 and to the FCT for the Doctoral fellowship SFRH/BD/67121/2009. We thank also to the COST Action MP0904 SIMUFER for funding the STSM realized in Dublin. COST action
References
[1] P. Ferreira, R. Z. Hou, A. Wu, M.-G. Willinger, P. M. Vilarinho, J. Mosa, C. Laberty-Robert, C. Boissière, D. Grosso, C. Sanchez, Langmuir, 28, 2944, 2012.

The Boltzmann distribution of electrons poses a fundamental barrier to lowering energy dissipation in conventional electronics, often termed as Boltzmann Tyranny^1-5. Negative capacitance in ferroelectric materials, which stems from the stored energy of phase transition, could provide a solution, but a direct measurement of negative capacitance has so far been elusive^1-3. Here we demonstrate the negative differential capacitance in a thin, single crystalline ferroelectric film, by constructing a simple R-C network and monitoring the voltage dynamics across the ferroelectric capacitor⁶. When a voltage pulse is applied, the voltage across the ferroelectric capacitor is found to be decreasing with time-in exactly the opposite direction to which voltage for a regular capacitor should change. The results are analyzed on the basis of the Landau-Khalatnikov equation, which shows that as the ferroelectric polarization switches its direction, it passes through the unstable negative capacitance region resulting in the characteristic "negative capacitance transients." Analysis of this ‘inductance&’-like behavior from a capacitor allows us to calculate the value of the negative capacitance directly and presents an unprecedented insight into the intrinsic energy profile of the ferroelectric material.
These results could provide a guideline for stabilization of the negative capacitance which could then overcome Boltzmann Tyranny in field effect transistors. The inductance-like behavior observed in this experiment could also lead to many other applications such as novel memory elements, to negate capacitances in an antenna, to boost up voltages at various part of a circuit, to develop coil-free resonators and oscillators, etc.
References:
1. Salahuddin, S., Datta & S. Use of negative capacitance to provide voltage amplification for low power nanoscale devices. Nano Lett. 8, 405-410 (2008).
2. Zhirnov, V. V. & Cavin, R. K. Negative capacitance to the rescue. Nature Nanotechnology3, 77-78 (2008).
3. Theis, T. N. & Solomon, P. M. It&’s time to reinvent the transistor! Science327, 1600-1601 (2010).
4.Theis, T. N. & Solomon, P. M. In quest of the next switch: prospects for greatly reduced power dissipation in a successor to the silicon field-effect transistor. Proc. IEEE98, 2005-2014 (2010).
5. Ionescu, A. M. & Riel, H. Tunnel field-effect transistors as energy-efficient electronic switches, Nature479, 329-337 (2011).
6. Khan, A. I., Chatterjee K., Wang B., Drapcho, S., You, L. Ramesh, R. & Salahuddin, S. Direct measurement of negative capacitance in a ferroelectric capacitor. (under review)

The relaxor ferroelectric (1-x)Pb(Mg_1/3Nb_2/3)O₃-xPbTiO₃(PMN-PT) has been widely used in transducers due to its excellent piezoelectric properties. Here we propose a new device concept of voltage-controlled magnetoresistive random access memory (MRAM) by integrating PMN-PT with anisotropic magnetoresistive (AMR) element, based on the bistable piezostrain-controlled magnetization switching in the NiFe thin film sputtered on (110)-oriented PMN-PT single crystal. The most remarkable feature of this device is the ultra-low power consumption due to its ideally zero current in the writing process. By applying a DC voltage perpendicularly to the PMN-PT crystal surface, two bistable piezostrain states can be produced. Such elastic strains can be passed to the top NiFe film and would lead to a bistable in-plane magnetization switching of around 10° in the latter via magnetoelastic coupling, as demonstrated by our in-situ AMR test. The proposed NiFe/PMN-PT bilayer memory device should provide a simple and new pathway towards high-performance storage devices.

We study integrated ferroelectric capacitors Pt/Pb(Zr_0.48Ti_0.52)O₃(PZT)/Pt/Ti/SiO₂/Si, which are the basic element of nonvolatile FeRAM. The PZT films were prepared with 15% of Pb excess by sol-gel deposition. The C1 and C2 capacitors differ in annealing conditions and Si substrate type. The (111) textured polycrystalline films are shown by scanning spreading resistance microscopy to have nonconductive PZT grain boundaries. Ferroelectric hysteresis loops, transient current-voltage characteristics, short-circuited photocurrent under illumination of the films by light with the quantum energy of 2.7 eV are measured. To control a preliminary film polarization, before each measurement the film is depolarized by applying external prolonged decaying sinusoidal voltage, which is then polarized in a certain direction.
With the external bias decay during the depolarization, the measured C1 polarization is found to tend to the stable value of P_dep = -16 µC/cm² directed from the top to the bottom electrode rather than to zero. We consider this result to be a giant self-polarization and explain it in terms of flexoelectricity. In this case a lattice mismatch between the film and substrate can induce strain gradient across the film thickness thereby producing the downward self-polarization. The strain gradient across the PZT film thickness is estimated to be ~10³cm^-1 from the in-plane lattice constants measured in XRD Θ-2Θ scans of Pt and PZT films. The strain gradient together with the flexoelectric coefficient found for PZT ceramic, 0.014 mu;C/cm [1], allows to estimate the possible flexoelectric polarization of ~14 µC/cm², coinciding well with the measured one. The positive direct bias application to the films together with the sinusoidal decaying bias or illumination of negatively poled film in a short-circuit state can switch the negative self-polarization into a state with zero or positive P_dep. Capacitors C2 do not show any initial self-polarization.
In transient current-voltage curves all the capacitors show peaks near values of coercive strength, with the current being larger in case the directions of the bias and polarization coincide. This result agrees with the current behavior in epitaxial PZT films and is opposite to the current behavior in polycrystalline PZT films with conductive grain boundaries, where the current is larger when the directions of the bias and polarization are opposite to each other [2].
[1] W. Ma, L. E. Cross. APL 86, 072905 (2005).
[2] L. Delimova, E. Gushchina, V. Yuferev, I. Grekhov, MRS Fall Meeting, Symposium P, P1.09 (2013).

The study of ABO₃-type solid solutions based on perovskite-structured BaTiO₃ has so far been of great interest as it offers the possibility to optimize several electrical properties for the manufacture of a number of devices. Nevertheless, pure BaTiO₃ shows large changes in permittivity around the phase transitions temperatures. This characteristic is a problem for many applications and many kinds of dopants have been added to depress and/or broaden the maximum permittivity. Nowadays, graded ferroelectric ceramics are established as an attractive class of materials which make possible the creation of a gradient of properties that cannot be attained in any homogeneous materials. The microwave sintering technique provides an appreciable structural homogeneity and a small average size of the grains. Thus, in the present work, the preparation and characterization of BaTiO₃/BaZrO₃/SrTiO₃ composite dielectric ceramics sintered using microwave energy is reported. The studied materials were prepared through the conventional ceramic method, starting from high purity precursor powders. These raw materials were mixed in stoichiometric proportions according to the nominal formulations: BaCO₃+xZrO₂+(1-x)TiO₂ → Ba(Zr_xTi_1-x)O₃+CO₂ (BZT) and (1-y) BaCO₃+ySr(C₂H₂O₂)₂+TiO₂+3.5yO₂ → (Ba_1-ySr_y)TiO₃+(3y+1)CO₂+2yH₂O (BST). After homogenization for 12h, the powders were then uniaxially compacted into disk-shaped samples with layers of BZT and BST. The temperature parameters, sintering time and heating rate were varied with the goal of avoiding the complete reaction between the compounds and, breakage of the ceramics, nonetheless, to achieve high densities (>95%). Electrical measurements were carried out with a Solartron SI 1260 impedance/gain-phase analyzer over a wide temperature range from 25 to 400^oC. The interface between the layers was evaluated by micro-Raman spectroscopy and scanning electron microscopy. The heating rate was studied and it was possible to get a pattern in which there was no breakage of the ceramics mainly between the junction of materials in virtue of the dissimilar thermal shrinkage between BZT and BST. This pattern comprises a slow heating rate so as to decrease thermal tension between the junctions. The density achieved by Archimedes method was above 95% of the BaTiO₃&’s theoretical density in all specimens. The interfaces show ~20 µm diffusion layer between the phases, as such, there is the formation of an intermediary compound in both layers. The permittivity curve (1 kHz) as a function of temperature shows a flat behavior within the temperature range studied. The dielectric spectra of the composites are characterized by dielectric peaks that correspond to the sum of each ferroelectric-to-paraelectric phase transitions in the isolated compositions. In addition, the nature of these transitions is seen to change from normal (sharp-like dielectric peak) to diffuse (broad-like dielectric peak).

Ferroelectric Random Access Memory is one of the most promising devices owing to its fast access time, non-volatility and low energy consumption. The development of higher integrated devices is still going, however, there is a crucial problem that the degradation in the ferroelectric properties by H₂ atmosphere in semiconductor integration process, especially with noble metal electrodes (i.e., Pt. Ir or IrO₂). This degradation has been attributed to the catalytic nature of noble metal, and the noble metal also caused a price increase. In this study, we fabricated ferroelectric lanthanum modified lead zirconate titanate (PLZT) capacitors with a conducting oxide material that has a high oxygen activity can suppress oxygen vacancies.
PLZT thin films on highly (111)-oriented sputtered Pt lower electrodes were derived by chemical solution deposition method. Then, Al-doped ZnO (AZO) and Sn-doped In₂O₃ (ITO) were deposited by pulsed laser deposition method with a shadow mask (SUS304) having a diameter of 50 ~ 500 mu;m as top electrodes. We evaluated electrical properties of fabricated ferroelectric capacitors. Forming gas annealing (FGA) was performed in a 95% N₂ and 5% H₂ atmosphere at 200°C and 1 Torr for 45 minutes and showed polarization loss.
Initial polarization values (2Pr) of PLZT capacitors with AZO and ITO top electrodes were 40.4 and 41.1 mu;C/cm², respectively. The 2Pr after FGA were 17.1 and 24.6 mu;C/cm², respectively, which indicated the polarization-voltage hysteresis loops were shifted the decrease of 2Pr and coercive voltage. We will investigated by secondary ion mass spectrometry to discuss the H₂ diffusion in the ferroelectric capacitors structures during FGA.

Ferroelectric thin films and LaNiO₃ (LNO) metallic conductive oxide thin films were prepared by a chemical solution deposition method. Pb_0.60Ba_0.20Ca_0.20TiO₃ and Pb_0.60Ba_0.20Sr_0.20TiO₃ and Pb_0.60Ca_0.20Sr_0.20TiO₃ ferroelectric thin films were grown on differents structures such as LNO/Si and single-crystalline quartz substrates. The LNO layer acts as the bottom electrode for the electrical measurements. X-ray diffraction (XRD) analysis shows that LNO thin films on Si substrates and Pb_0.60Ba_0.20Ca_0.20TiO₃ and Pb_0.60Ba_0.20Sr_0.20TiO₃ and Pb_0.60Ca_0.20Sr_0.20TiO₃ thin films on LNO/Si structures are polycrystalline with a moderate (110)-texture and a complete perovskite phase. Electrical resistivity-dependence temperature data confirm that LNO thin films display a good metallic character over a wide large range of temperatures. Optical characteristics of ferroelectric thin films have also been investigated using ultraviolet-visible (UV-vis) spectroscopy in the wavelength range of 200-1100 nm. Ferroelectric thin films show a direct allowed optical transition with optical band gap values on the of order of 3.54, 3.66 and 3.89 eV for Pb_0.60Ba_0.20Ca_0.20TiO₃, Pb_0.60Ca_0.20Sr_0.20TiO₃ and Pb_0.60Ba_0.20Sr_0.20TiO₃ thin films deposited on a SiO₂ substrate, respectively. Good dielectric and ferroelectric properties are reported for ferroelectric thin films deposited on the LNO layer as bottom electrodes. Pb_0.60Ba_0.20Ca_0.20TiO₃ and Pb_0.60Ba_0.20Sr_0.20TiO₃ and Pb_0.60Ca_0.20Sr_0.20TiO₃ ferroelectric thin films show a hysteresis loop with remnant polarization, P_r, of 9.6, 6.6 and 4.2 mC/cm² at an applied voltage of 6 V, respectively.

We demonstrate a unique film deposition and/or processing technique using supercritical carbon dioxide fluid (scCO₂) for fabricating ultrathin metal oxide thin films (t_f < 100 nm), convined with sol-gel processes. Conventional sol-gel film deposition typically includes heat treatment operation under ambient or vacuum pressure for decomposition the precursor gel films although it sometimes damages to the resulting films via unfavorable rapid evaporation or residual solvents followed by the burst-out or shrinkage of ultrathin layers. For constructing effective deposition/processing systems of ultra-thin metal oxide films based on the sol-gel processes, the chemical fluid processes using scCO₂ would be an prospective approach because of its unique characteristics; e.g., extraction ability, transportation capability, and reaction equilibrium etc., are quite favorable for decomposition or crystallization of the precursor gel films. [1,2] Here, we propose some chemical processing procedures for fabricating ultrathin films in Hf-Zr-O system without unfavorable damages which is utilized as high-k dielectric layers for FET presently as well as prospective non-perovskite ferroelectric components for FeRAM in recent researches. [3]
The present research proposes two techniques for the film processing using scCO₂, i.e., (i) supercritical fluid treatment for sol-gel-derived precursor films, and (ii) supercritical fluid deposition using metal-alkoxide/b-diketonate compounds. All of the film processing in a hot-wall closed vessel filled with scCO₂ fluid together with substrate stage/heater. For the (i) supercritical treatment for the precursor films, precursor gel films of Hf-Zr-O films on platinized Si wafer prepared from metal alkoxides were enclosed in the vessel with scCO₂ under the fluid pressure of 15 MPa and substrate temperature of up to 300^oC. The supercritical fluid treatment removed residual organic species, such as solvents or alcohol byproducts, from the gel films successfully by extractive gel drying to yield smooth ultrathin layers of amorphous Hf-Zr-O, whereas rough and damaged thin layers due to the burst-out were obtained by conventional heat treatment under ambient pressure. For the (ii) supercritical fluid deposition, metal-oxide ultrathin films were deposited from scCO₂ solution of metall-alkoxide/b-diketonate compounds such as a Zr[O-i-CH(CH₃)₂]₂(dpm)₂ on the surface of heated Pt/Si substrates at deposition temperature up to 300^oC. The deposition of amorphous Hf-Zr-O layers with smooth suraface were obtained above 200^oC, which was significantly lower than those by chemical vapor deposition process (above 400^oC).
[1] A. H. Romang and J. J. Watkins, 110 (2010) 459.
[2] F. Kano, et al., J. Supercrit. Fluids, 50, (2009) 313.
[3] J. Muller, et al., Nano Lett., 12 (2012) 4318. and many other articles

We propose here a novel and unique technique for conformal deposition of metal oxide thin films on trenched substrate surfaces using supercritical carbon dioxide (scCO₂) fluid as a transport medium for precursor delivery and byproduct removal. The film-deposition processes with conformal step coverage has been required for manufacturing high-density memory array on silicon silicon chips because it enables convexed and/or concave capacitor cells with wide surface areas, such as crown, stacked disk, or deep trench features, suitable for conventional 1T-1C-type memory, as well as vertical (3D) type memory cell array for next generation. The supercritical fluid deposition (SCFD), [1-3] which consists of precursor delivery and deposition in scCO₂ atmosphere followed by byproduct removal, would be an effective approach for them because it provides favorable condition for the film deposition with the coexistence of greater diffusivity and solubility of metal-organic precursors, that enables conformal step-coverage with higher deposition rate. In the presentation, we report the process performance of SCFD for conformal step coverage on trenched surface as well as the mechanism of precursor transport and material deposition.
The film deposition using supercritical CO₂ fluid was accomplished utilizing the SCFD apparatus equipped high-pressure vessel, substrate stage/heater and fluid exhaust. Metal alkoxides or alkoxide/b-diketonate complexes, e.g., Si(OC₂H₅)₄ for SiO₂ and Ti[O-i-CH(CH₃)₂]₂(dpm)₂ for TiO₂ deposition, were utilized as precursors of the film deposition. The precursor was dissolved in scCO₂ and delivered to the surface of trenched Si wafer heated by substrate heater, which was all accomplished under scCO₂ atmosphere with fluid temperature of 40-60^oC and pressure of 8-10 MPa. For the SCFD of TiO₂ films, the deposition consisted of crystalline TiO₂ (anatase), with dielectric permittivity of ~40, was obtained at the substrate temperature above 100^oC. The deposition rate of approximately 1-9 nm/min depending on the fluid temperature and pressure (i.e., fluid density), which is comparable to or higher than those of ALD or CVD. The trenched features on Si wafer with trench width of 1.0 mm and aspect ratio of ~5 were covered with the deposition conformally at the first stage of film deposition, while the trenches were filled with the deposition fully as the deposition time passed; no clogging or aggregation of the precursor was observed. These results suggest that scCO₂ in SCFD apparatus delivered the precursor molecules with higher concentration but lower viscosity on/in trenched structures. The SCFD for other materials such as SiO₂ and ZrO₂ will be reported in our presentation.
[1] E. Kondoh, and H. Kato, Microelectron. Eng., 64 (2002) 495.
[2] A. H. Romang and J. J. Watkins, 110 (2010) 459.
[2] F. Kano, et al., J. Supercrit. Fluids, 50, (2009) 313.

Ferromagnet/superconductor heterostructures are an attractive model system for studying unusual proximity effects and the interaction between magnetism and superconductivity in low-dimensional structures. In this work we present recent experimental results on heterostructures composed of ferromagnetic La_0.67Sr_0.33MnO₃ (LSMO) and superconducting YBa₂Cu₃O₇ (YBCO) bi- and three-layers with a thickness of an individual layer between 20 and 100 nm, grown by dc sputtering method. The thickness and configuration of LSMO and YBCO layers have been changed in a systematic way to modify the intensity and the nature of interaction between those layers. Transport and magnetic properties of the large set of heterostructures have been investigated in a wide temperature range 2-400 K and in fields up to 14 T. Superconducting critical current densities have been measured for both as-made and by FIB (Focused Ion Beam) structured samples with active dimensions 1.5 x 5 mm² and 10 x 100 mu;m, respectively. We have observed an influence of the magnetic LSMO layer on superconducting properties of the adjacent YBCO layer and vice versa. STM studies have been performed to show the topography and tomography of our samples, which is important for proper interpretation of the magnetic and transport results being obtained. The Nernst effect has been studied in the mixed state revealing the characteristic temperature dependence of the Nernst signal which seems to be correlated with the upper critical field.
Acknowledgements: The work was supported by WRC EIT+ within the project NanoMat (P2IG.01.01.02-02-002/08) co-financed by the European Operational Programme Innovative Economy (1.1.2).

Multiferroic materials have been extensively studied due to their simultaneous electric and magnetic ordering when applied electric and magnetic fields, respectively. The possibility of controlling the magnetic ordering by applying a magnetic field has attracted interest for these types of materials that exhibit this effect called magnetoelectric coupling. Among these materials, the BiFeO₃ compounds is one of the few known materials that present this effect, which make them a very promising material to apply in multifunctional devices. Although, the presence of Bi in such compounds causes instability and creates impurities that affect their electric conductivity, which cause the difficulty to observe the physic phenomena. This can be reduced by substitution of Bi by others elements as, for example, rare earths. In this context, the aim of this work is to syntheses multiferroic compounds of Pr_1-xBi_xFeO₃ by a microwave-assisted hydrothermal method. To investigate the best synthesis parameters, compounds that were prepared by different temperatures (200-230 °C) and times (1-3 h) were analyzed. The structural properties were performed by X-ray powder diffraction using a diffractometer (model D8-Focus, Bruker). From the results, we chose the best synthesis parameters to prepare compounds by this methodology and the best temperature and time of synthesis conditions are 200 °C and 120 min, respectively. Then, these results revealed that samples crystallize in a rhombohedrally distorted perovskita structure (space group R3c) with some impurities as Bi₂Fe₄O₉ and Bi₂₅FeO₄₀. XRD data indicates that the presence of Pr in the structure of BiFeO₃ reduced these impurities. In addition, images of scanning electron microscopy (SEM) are being obtained to examine the morphological properties by using the microscope of JEOL (model JSM-6701F), and the SEM micrographs revealed that samples seems to present a square-shaped grains with sizes smaller than 100 nm. The magnetic properties have been characterizing through measures of the magnetization as function of field and temperatures using the physical properties measures system (PPMS) of Quantum Design.

Spin Transfer Torque Magnetic Random Access Memories (STT-MRAM) rely on two spintronic phenomena: the tunnel magnetoresistance of magnetic tunnel junctions (MTJ) and the spin transfer torque. The former allows reading-out the magnetic state of the junction thanks to a change of electrical resistance associated with its magnetic configuration. The second allows writing in the STT-MRAM cell, i.e. changing its magnetic configuration, thanks to the spin-polarization of the tunneling electrons. STT-MRAMs are resistive RAM with memristor capabilities as Redox RAM. They are attracting an increasing interest in microelectronics thanks to their unique set of performances. In particular, among the various technologies of non volatile memories (MRAM, RedoxRAM, Phase Change RAM), STT-MRAM have additional advantages of speed and endurance which make them the best candidates for DRAM or SRAM-like applications.
Lot of progresses have been made in the past 3 years concerning the growth, reliability and patterning of magnetic tunnel junctions. The main issues for sub-20nm dimensions remain the control of cell to cell variability in particular caused by etching induced defects in the MTJ stacks. At larger dimensions and in particular for embedded applications, the variability and reliability is close to acceptable for commercial products. STT-MRAM can encompass a wide variety of standalone and embedded applications. In the longer term, the best benefit of STT-MRAM could arise from totally new architectures in which memory and logic would be much more finely intermixed. These logic-in-memory architectures could lead to a new Normally-off/Instant-on electronics.
Our recent work has aimed in increasing the read and write margins in STT-MRAM by using double barrier MTJ comprising a read/write mode select layer in addition to the conventional magnetic reference and storage layers. The purpose of this layer is to modulate the spin transfer efficiency so as to maximize it during write and minimize it during read. This allows on one hand to write at lower current density (STT writing at 6.10⁵A/cm² demonstrated corresponding to write voltage below 0.4V) and on the other hand to read at higher voltage than in conventional STT-MRAM with minimal risk of accidental write during read. When STT efficiency is minimized, bias voltage up to 1V can be applied without affecting the MTJ magnetic state. This approach is particularly suited for memories which do not require frequent changes between write and read modes.
Work partly funded by ERC project HYMAGINE.

Magnetic random access memory (MRAM) utilizes the parallel or antiparallel orientations of two magnetic layers on either side of a tunnel barrier to achieve a resistance contrast. The alignment of the free layer to the fixed layer can be reversibly changed by the polarity of a write current. The magnetic tunnel junction MRAM devices are typically very small, with cross-sections in the order of 100 nm², and are composed of a complex stack of materials which exhibit interesting electro-thermal properties.
In this work, we use an electro-thermal model to analyze the heating of the magnetic tunnel junction device during write operations. The heat generated in the magnetic layers is localized due to tunneling current, Peltier effect, thermal isolation by the tunnel barrier and thermal boundary resistances. This heat can raise the temperature of the ferromagnetic layers, potentially above Curie Temperature, hence demagnetizing it.
In this work we are modeling a magnetic tunnel junction MRAM as described in [1], with a 1 nm MgO tunnel barrier, with CoFeB fixed and free magnetic layers. The stack is composed of SiO₂ / Cu / Ta / CoFeB-free / MgO / Fe / CoFeB-fixed / Ta/ CoPd / Ru / Cu / SiO₂. The heat generated by the tunneling current is applied only on one side of the tunnel barrier, using an I-V relationship described in [2] and an equation of heat created from inelastic electron scattering [2, 3]. The electrical conductivity, Seebeck coefficients and thermal conductivities are based on the data available in literature. The temperature dependent thermal conductivity of the conductors are based on the electrical conductivity and Wiedmann-Franz relationship.
The simulated current density and total current output using our model are in agreement with previous works [3], while also yielding temperature increases in excess of 50 K - significantly higher than previous reports [4]. Our modeling so far suggests that thermoelectric contributions can be significant in MRAM switching dynamics.
References
[1] D. Worledge, G. Hu, D. W. Abraham, P. Trouilloud and S. Brown, "Development of perpendicularly magnetized Ta| CoFeB| MgO-based tunnel junctions at IBM" J. Appl. Phys., vol. 115, pp. 172601, 2014.
[2] S. Yuasa and R. Jansen, "Voltage tuning of thermal spin current in ferromagnetic tunnel contacts to semiconductors" 2014.
[3] E. Gapihan, J. Hérault, R. Sousa, Y. Dahmane, B. Dieny, L. Vila, I. Prejbeanu, C. Ducruet, C. Portemont and K. Mackay, "Heating asymmetry induced by tunneling current flow in magnetic tunnel junctions" Appl. Phys. Lett., vol. 100, pp. 202410, 2012.
[4] J. NamKoong and S. Lim, "Temperature increase in nanostructured cells of a magnetic tunnel junction during current-induced magnetization switching" J. Phys. D, vol. 42, pp. 225003, 2009.

The ability to control and explain dynamic behavior of the 360° domain walls (360DWs) is of intense interest as it differs significantly from the behavior of the 180° domain walls (180DWs) currently used in several proposed nonvolatile memory devices. Detailed study of the effects of magnetic #64257;elds and nanosecond current pulses on 360DWs in curved NiFe nanowires is presented. The nanowires have dimensions of 200 nm wide and 5 - 10 nm thick and attached to circular injection pads of 1.2 µm in diameter. In order to form the 360DWs in a nanowire we applied saturating magnetic #64257;eld perpendicular to the wire to form a 180DW, followed by a smaller reverse field to inject a second 180DW of opposite sense, which combines with the first 180DW to form a 360DW [1]. The formation and equilibrium structure of 360DWs in the wire was verified by MFM measurements. Anisotropic magnetoresistance was used to detect 360DWs and a coplanar waveguide to inject current pulses with ns duration. According to the micromagnetic simulations [2] predictions that current pulses will either translate a 360DW or lead to its destruction, with the annihilation threshold varying with applied field. However, fields alone do not translate 360DWs, but instead compress or dissociate them. The comparison between experimental results of current pulsing and the micromagnetic predictions are discussed. This work could provide information about the dynamic behavior of 360DWs in racetrack memory devices and the possibility of new spintronic applications using 360DWs.
[1] Y. Jang, et al, Appl. Phys. Lett.100, 062407 (2012).
[2] M. D. Mascaro and C. A. Ross, Phys. Rev. B82, 214411 (2010).

Nonvolatile memory devices such as racetrack memory rely on the manipulation of domain walls (DWs) in magnetic nanowires, and scaling of these devices requires an understanding of domain wall behavior as a function of the wire width. Due to the increased importance of edge roughness and microstructure in narrow lines, DW pinning increases dramatically as the wire dimensions decrease and stochastic behavior is expected depending on the distribution of pinning sites.
We report on the field driven domain wall (DW) statistics in sub-100 nm wide nanowires made from Co films of 8 nm thickness made by an electron beam lithography and etching process that minimizes edge roughness (Currivan et al., J. Vac. Sci. Technol. B, 32 021601 2014). The nanowires were patterned in the form of a set of concentric rings with widths varying from 30 nm to 60 nm and spacing varying from 40 nm to 60 nm. The diameters of the rings were around 10 mu;m. The rings were first saturated in plane to produce an onion state with two DWs in the rings, then the walls were translated in the wires using an orthogonal in-plane field. The position of the DWs in the nanowires was determined with magnetic force microscopy (MFM) each time after applying a field. In these narrow wires the MFM tip field did not disturb the DW positions, unlike for wider wires, above 200 nm wide, in which tip-induced dragging was observed. From the positions of the DWs in the nanowires, the strength of the extrinsic pinning sites was identified and found to follow Poisson&’s distribution to a good approximation. For example, sites with depinning field of 220 Oe had an average spacing of ~0.5 µm whereas sites with depinning field of 410 Oe had an average spacing of ~4 µm. For the closely spaced wires, magnetostatic interactions led to correlated movement of DWs in neighboring wires. The stray field from the neighboring wires was determined from Object Oriented MicroMagnetic Framework (OOMMF) simulations and was significant (~180 Oe) compared to depinning fields (~200 Oe) for the closely spaced wires. The implications of DW pinning and interaction in nanoscale DW devices will be discussed.

In order to implement spin-Field Effect Transistor (spin-FET), gate control of spin-orbit interaction parameter (α) is a key factor in a quantum well structure because spin precession is influenced by strength of the spin-orbit interaction parameter [1]. Many papers utilized n-type channel for the spin transport, however, for the complementary logic device p-type channel should be also necessary.
In this research, using a two-dimensional hole gas (2DHG) structure, Shubnikov-de Haas (SdH) oscillation measurement is performed for extracting the spin-orbit interaction parameter of the p-type channel. We grew a p-type GaSb channel which is sandwiched by double cladding layers of In_0.53Ga_0.47As and In_0.52Al_0.48As. A Be-doped InP layer is used as a carrier supply layer in the 2DHG structure. In this structure, the Rashba spin-orbit interaction, which can arise from an asymmetry in the confined potential of the quantum well, induces imbalance of spin-up and -down holes. For the SdH measurement, a 64mu;m wide Hall bar is defined by photo-lithography with dry etching process and a 100 nm thick SiO₂ layer is deposited as a gate insulating layer.
Shubnikov-de Haas (SdH) oscillation measurement was used for extracting the effective mass and the spin-orbit interaction parameter in a GaSb two-dimensional hole gas (2DHG) structure. The observed SdH beating patterns are generated by the different populations of spin-up (p_uarr;) and -down (p_darr;) holes which can be described by according to p_uarr;,darr; = nu;_uarr;,darr;/eh. Here, nu; is the frequency of the Shubnikov-de Haas oscillation, e is electron charge and h is Planck&’s constant. Even without a gate field, p_uarr; and p_darr; are 1.26 × 10¹² cm^-2 and 1.02 × 10¹² cm^-2, respectively. From this data, the spin-obit interaction parameter of 1.71 × 10^-11 eVm can be also obtained by [2]
α=(p_uarr; minus; p_darr;)h²/4π²m^*radic;π/[2p_S minus; 2(p_uarr; minus; p_darr;)],
where total hole concentration is p_S = p_uarr; + p_darr; and the effective hole mass m^* is 0.98m₀ which is obtained from temperature dependence of amplitude of Shubnikov-de Haas. We also investigate the gate controllability of the α and the carrier concentration. As increasing the gate voltage both the α and the hole concentration are reduced, which indicates the a increases with the carrier concentration in the p-type channel. On the order hand, n-type channel shows opposite gate dependence [1, 3]. Therefore, the complementary inverter device combined p- and n-type channel spin transistor can be proposed [4].
[1] H. C. Koo, J. H. Kwon, J. Eom, J. Chang, S. H. Han, and M. Johnson, Science, 325, 1515 (2009).
[2] G. Engels, J. Lange, Th. Scha#168;pers, and H. Lu#168;th, Phys. Rev. B. 55, 1958 (1997).
[3] J. Nitta, T. Akazaki, and H. Takayanagi, Phys. Rev. Lett. 78, 1335 (1997).
[4] Y. H. Park, H. C. Koo, S. -H. Shin, J. D. Song, J. Chang, S. H. Han and H. -J. Choi, Solid-State Electronics. 82, 34-37 (2013).

Spin-orbit torque MRAM (SOT-MRAM) is a novel memory concenpt recently proposed [1] and holds the promise for providing a fast access, energy-efficient, scalable, high density non-volatile memory technology. A typical SOT-MRAM stack is composed of a Magnetic Tunnel Junction (MTJ) grown on top of a metal exhibiting high spin-orbit coupling or/and high spin Hall effect, which acts as the read/write current line.
Although intial studies were focused on Pt | Co | AlOx stacks [2], there has been a shift towards Ta/CoFeB/MgO/CoFeB structures, due to the higher spin-orbit coupling of Ta, the readily obtainable perpendicular magnetic anisotropy (PMA) of CoFeB, and the more effective spin-dependent tunneling through the monocrystalline MgO barrier [3].
Recently, there has been a focus on W for use as current line metal, due to the reported giant spin Hall effect [4], promising the fabrication of MTJs operating at even lower read/write current. Obtaining W-based MTJ devices with PMA would be a breakthrough, paving the way for the industrial application of SOT-MRAM technology. In this context, we study W | Ta | Co₂₀Fe₆₀B₂₀ | MgO and WTa-alloy | Co₂₀Fe₆₀B₂₀ | MgO half-MTJ stacks.
Stacks are sputter deposited on monocrystalline Si <100> substrates with 500 nm thermal Si oxide. DC (RF) power supply is used for metal (MgO) sputtering. All the stacks are covered by an AlOx layer for preventing oxygen diffusion through MgO and into CoFeB. Series of samples with CoFeB thickness between 0.6 nm and 1.8 nm have been deposited and thereafter annealed in ultrahigh vacuum for 1 hour, at temperature between 200^oC and 350^oC.
X-ray diffraction (XRD) and anomalous Hall effect (AHE) magnetometry has been performed to characterize the samples. XRD spectra show that the W underlayers have the desirable highly resistive and high spin-orbit coupling β-phase, even after annealing at 350^oC for 1 hour. AHE magnetometry reveals a clear PMA for the samples deposited on top of W/Ta or WTa-alloy underlayers, with CoFeB thickness between 0.9 and 1.2 nm. Samples with lower thickness show superparamagnetic behavior, indicating an island CoFeB growth, while thicker samples have in-plane magnetic anisotropy. We will present a systematic study of these half-MTJs providing further insight on the CoFeB | MgO system.
REFERENCES
[1] I. M. Miron et al., Nature 476, 189 (2011)
[2] I. M. Miron et al., Nature Materials 9, 230 (2010)
[3] S. Ikeda et al., Nature Materials 9, 721 (2010)
[4] C.-F. Pai et al., Appl. Phys. Lett. 101, 122404 (2012)
ACKNOWLEDGMENTS
Funding from the E.C. through a FP7-ICT-SPOT project (Grant No. 318144, http://www.spot-research.eu/) is acknowledged. Stimulating discussions with Dr Gilles Gaudin from Spintec, CNRS, France and Prof. Pietro Gambardella from ETH, Switzerland, are aknowledged.

Chromia on alumina, i.e. Cr2O3/Al2O3 and carbon/ Cr2O3/Al2O3 samples, were investigated by the both longitudinal and polar magneto-optic Kerr effect (MOKE). The low energy electron diffraction for the chromia/alumina film exhibits C_3V symmetry, indicating that the film grown on alumina occurs in a single domain film, or at least twinning of the chromia is vastly suppressed and that the chromia lattice is aligned with that of the Al₂O₃(0001) substrate, as noted by many previous investigators. The anisotropy of the surface moments appears to be perturbed by the nature of the chromia interface. The ultra thin films of Cr2O3 do exhibit a magneto-optical Kerr effect response, particularly in polar MOKE for the free surface chromia and for planar MOKE for the carbon covered chromia at room temperature indicating the persistence of local moments in chromia, even in the thin film limit.

Magnetic memory storage has traditionally relied on modulating the direction of the remanent field. This field is ‘read&’ in bits of data to determine each one&’s memory state. Thus, the read field is incorporated into the storage media while the write, or switching, field is externally applied. We are exploring a technique to decouple the read field from the storage media by using changes in its magnetic permeability rather than remanence. Differences in the magnetic permeability are read by applying a user-defined probe field and measuring the magnetic variations in the vicinity of the media due to the local permeability state (i.e. high permeability bits attract flux while low permeability bit do not). Dependence on the material&’s permeability can eliminate the need for a switching field, enhance data retention times, and allow greater flexibility in optimizing the probe field for reading the data. We have demonstrated the applicability of the technology to store information in at least two media, permalloy and Fe₄₀Ni₃₈Mo₄B₁₈ Metglas. Initial tests were performed on lithographically deposited permalloy on the micron scale. Subsequent investigations involved thermally writing low permeability bits into a high permeability amorphous Metglas film via a diode laser. While spin torque transfer and thermally-assisted switching have reduced the amplitude of the write field, our method allows us to forego its use entirely. In addition, analogous to some types of phase change memory, strain relaxation and nanocrystallization induced by thermal writing suggests that Metglas can be incorporated into a multi-state media dependent on the writing time and power. The media was mechanically read by detecting modifications in a user-defined field via either a magnetic tunnel junction (MTJ) or spin torque oscillator (STNO). The field was 32 Oe for the MTJ and 400 Oe for the STNO. The later has the potential advantage that very small regions that are superparamagnetic can still be read under the application of a large probe field. We have measured 2% frequency shifts in STNO using micron-sized bits of permalloy and laser-crystallized Metglas. The high (low) permeability regions decreased (increased) the field detected by the MTJ by almost 1% (2%).

Several compositions of the Fe_1-xSn_xBi₂Se₄ (0 < x < 1) solid solution were synthesized by combining high purity elements in the respective stoichiometric ratios at moderate temperatures. Powder X-ray diffraction (PXRD) suggests that the synthesized phases are isostructural with the parent compound, FeBi₂Se₄, despite the large difference in the ionic atomic radii of Fe²⁺ and Sn²⁺ in octahedral coordination. X-ray diffraction on single crystal reveals an ordered distribution of Fe²⁺, Sn²⁺, and Bi³⁺ in various metal sites within the crystal structure for the Fe_0.5Sn_0.5Bi₂Se₄ (x = 0.5) composition. High temperature direct current magnetic susceptibility measurements reveal that the series is ferromagnetic through a large range of temperature exceeding 300 K with a Curie temperature of T_c ~ 450 K. Hall effect measurements confirm the n-type semiconducting nature of the compounds, while resistivity measurements highlight the magnitude of the electrical conduction. Magnetotransport data confirm the presence of spin-polarized electrons, indicating magnetic exchange interactions between localized spins on magnetic centers and spins of the itinerant carriers. This exchange interaction (s-d or p-d) is believed to be responsible for the large T_c observed in Fe_1-xSn_xBi₂Se₄ phases, a possible candidate to low-power nonvolatile memories.

The introduction of spin degree of freedom into the semiconductor technology envisages the possibility of integrating both information processing and storage in a single device: one way to get this result is to introduce transition metal impurities in a semiconductor host, making a dilute magnetic semiconductor (DMS). Among various DMS alloys, Ge_1-xMn_x inter alia has gained considerable attention thanks to its compatibility with mainstream Si technology. One of the major research effort, together with increasing the critical temperature, is to overcome the Mn tendency to cluster and form precipitates like Ge₃Mn₅ and Ge₈Mn₁₁ exhibiting large ferromagnetic interactions (T_c 270° C and 296° C respectively) and typically occurring in epitaxial films grown by Molecular Beam Epitaxy [1]. To avoid such a precipitation two main strategies are available, the first being to carefully tune the growth parameters as rate of deposition (R_d), temperature of the substrate (T_s) and Mn concentration of the epitaxial film. Another way is to grow the semiconductor on thermal SiO₂ avoiding the occurrence of epitaxial growth. In this work, Ge_1-xMn_x thin films with different Mn concentration (ranging in the interval 0.3-36 at%) were grown by low temperature (T_s = 150° C) UHV e-gun evaporation on SiO₂ substrate (300 nm thermal oxide) with R_d =12 Å/min, a condition which should promote the formation of the Ge₃Mn₅ and Ge₈Mn₁₁ in a epitaxial films but not in amorphous ones [2].
Compositional analysis by XPS has been carried out in order to verify the Mn concentration and alloy homogeneity. The dependence of electrical resistivity on temperature has been studied indicating a metallic behavior at high Mn concentration (36%). Conversely, semiconductor-like behavior in specimens with low Mn% has been observed together with an increase of the film&’s resistivity.
Temperature evolution of magnetization has been measured by VSM-SQUID together with magnetization hysteresis loops as a function of temperature. All the films are characterized by a T_c lower than 200 K also for high Mn concentration excluding the formation of Ge₃Mn₅ and Ge₈Mn₁₁ ferromagnetic precipitates.
The ferromagnetic behavior of Ge_1-xMn_x films degrades after annealing that has been carried out with Rapid Thermal Annealing (RTA) for 1 min at 400°C. As evidenced by Raman spectroscopy, re-crystallization occurs in all samples depending on the content of Mn and influences their ferromagnetic role. Explanations for such an effect will be given.
[1] Jamet, M., Barski, A., Devillers, T., Poydenot, V., Dujardin, R., Bayle-Guillemaud, P., Tatarenko, S. . Nature Materials, 5(8), 653-9 (2006)
[2] Yada, S., Okazaki, R., Ohya, S., & Tanaka, M. Applied Physics Express, 3(12), 123002. (2010).

Pb(Zr_0.53Ti_0.47)_0.60(Fe_0.5Ta_0.5)_0.40O₃ (PTZFT) is a single-phase multiferroic material, exhibiting remanent polarization of sim;14 mu;C/cm² in bulk, remanent magnetization sim;0.024 emu/g and large magnetoelectric coupling coefficients sim; 1x10^-7 s/m at room temperature. A multiferroic tunnel junction (MFTJ) consists of metal or ferromagnetic electrodes separated by a ferroelectric (FE) or single-phase multiferroics barrier. MFTJ device displays four non-volatile resistance states due to the coexistence of tunneling magnetoresistance and tunneling electroresistance effects, which makes them very promising for the application in memory devices. In order to study thickness effect on electrical and magnetic properties from thicker to ultrathin films, we have grown films with thicknesses from 4 to 100 nm of PZTFT on LSMO/(LaAlO₃)_0.3(Sr₂AlTaO₆)_0.7 (LSMO/LSAT) (001) substrate deposited by pulsed laser deposition technique. The x-ray diffraction patterns of the heterostructures show only (00l) reflections corresponding to the LSAT substrate, PZTFT and LSMO layers. The Atomic force microscopy of PZTFT/LSMO/LSAT heterostructures showed that the average surface roughness decreases from 1.7 to 0.4 nm for PZTFT films with thickness from 100 to 4 nm respectively. Well saturated ferroelectric loops were observed for PZTFT films with a remanent polarization of 43, 32, 25 and 10 mu;C/cm² for films with thicknesses of 100, 80, 50 and 25 nm respectively. An enhanced saturated magnetization (M_s) was observed with decrease of PZTFT layer thickness in PZTFT/LSMO-50 nm structures. The average M_s values for PZTFT/LSMO heterostructures were 77, 33, 25, and 15 emu/cm³ for 100, 80, 50, and 20 nm respectively, at 300 K. Enhancement in magnetization with decrease in PZTFT thickness may be due to the interface effect between PZTFT/LSMO layers. Piezo force microscopy measurements for 4, 5, and 7 nm ultrathin PZTFT films showed a clear and reversible out-of-plane phase contrast above ± 4 V, which indicates the ferroelectric character of ultra-thin films. The effect of PZTFT film thickness on temperature dependent dielectric properties will be discussed.

Ferroelectric memories, such as ferroelectric random access memory and ferroelectric field-effect-transistor memory, have been regarded as one of the most promising universal non-volatile memories, because of their reversibly bi-stable polarization states. Most of the previous researches have focused on material systems based on perovskite structure. However, integrating ferroelectric thin films having perovskite structure into conventional Si-based memory technology has been proven rather challenging for many reasons, such as ferroelectric size effect, degradation by thermal budget during crystallization, small bandgap, poor interfaces with Si, and degradation due to forming gas annealing. Recently, it was reported that HfO₂ thin films can be ferroelectric when they are doped with various elements, such as Si, Y, Al, and Zr. This is highly beneficial in the field of ferroelectric memory, because HfO₂ is compatible with conventional Si technology and appropriate for 3-dimensional capacitors, due to its small film thickness, and highly matured atomic layer deposition technique. Among the various dopants that have been used, Zr shows great promise, because Hf_1-xZr_xO₂ can show robust ferroelectricity in a wider range of composition near the composition of Hf_0.5Zr_0.5O₂, which makes the material appropriate for mass-production. In this presentation, the researches on HfO₂-based ferroelectrics will be reviewed and our recent works on Hf_1-xZr_xO₂ films, including the origin of the ferroelectricity in these materials, will be presented. The usefulness of antiferroelectric Zr-rich Hf_1-xZr_xO₂ as the energy harvesting, storage, and sensor materials will also be discussed.

Ferroelectric (FE) materials enable design of integrated circuits for nonvolatile random access memories, micro-electro-mechanical devices, and high frequency electrical components. Till date Pb(Zr,Ti)O₃ (PZT) has been extensively deliberated as feasible FE media owing to its highest polarization and piezoelectric coefficients. [1] However, the toxicity of Pb in PZT has resulted in efforts to find novel environment-friendly FE materials with superior polarization properties. [2] To this end, the Pb-free noncentrosymmetric (NCS) derivatives of perovskite oxides have gather considerable attention for their symmetry-dependent polarization properties. [3] Among the FE NCS oxides, LiNbO₃ (LN)-type ZnSnO₃ with R3c space group and the electronic configuration of (n-1)d¹⁰ns⁰ has high theoretically predicted spontaneous polarization of asymp; 59 mu;C/cm². [4] Large remanent polarization (asymp; 47 µC/cm²) is also reported from a heteroepitaxially grown ZnSnO₃ thin-film. [5] Here, we adopted a combined pulsed-laser deposition (PLD) technique and a solvothermal synthesis scheme to synthesize phase pure LN-type ZnSnO₃ nanostructure arrayed thick films (asymp; 20 µm) on Si substrates assisted by ZnO:Al template-layers. The similar crystal symmetry and comparable lattice parameter between the template-layer and LN-type ZnSnO₃ facilitated the dense growth of high-quality ZnSnO₃ nanostructure arrays in the form of one-dimensional vertical and lateral nanowires, nanorods and two-dimensional nanoflakes. The strategic synthesis method allowed improved tunability of the morphology, crystallinity, orientation and packing density of ZnSnO₃ nanostructures as investigated by X-ray diffraction, atomic force microscopy, scanning electron microscopy, transmission electron microscopy, and Raman spectroscopy. We also discuss the first evidence of superior FE properties from these LN-type ZnSnO₃ nanostructure arrays demonstrating a remanent polarization value as high as asymp; 30 µC/cm² in oriented nanowires. [6] In-depth analyses of the electrical and FE properties of the prototype devices in relation to the structures will be presented and their potential for designing future Pb-free FE devices for non-volatile memory applications will be discussed.
[1] R. Guo, L. E. Cross, S. E. Park, B. Noheda, D. E. Cox, G. Shirane, Phys. Rev. Lett. 2000, 84, 5423.
[2] J. W. Bennett, K. M. Rabe, J. Solid State Chem. 2012, 195, 21.
[3] N. A. Benedek, C. J. Fennie, J. Phys. Chem. C2013, 117, 13339.
[4] Y. Inaguma, M. Yoshida, T. Katsumata, J. Am. Chem. Soc. 2008, 130, 6704.
[5] J. Y. Son, G. Lee, M. -H. Jo, H. Kim, H. M. Jang, Y. -H. Shin, J. Am. Chem. Soc. 2009, 131, 8386.
[6] A. Datta, D. Mukherjee, C. Kons, S. Witanachchi, P. Mukherjee, Small, 2014 (accepted).

Bi₄Ti₃O₁₂ (BTO) was prepared by using a novel deposition technology, supercritical fluid deposition (SCFD). Stoichiometric and crystalline BTO film was formed conformally onto the deep trenches (0.7-mu;m-width and 7-mu;m-depth). The process is preferred for fabrication of ferroelectric layer in 3-dimensional (3D) ferroelectric random access memory (FeRAM).
SCFD involves the oxidation/reduction of organic compounds in supercritical CO₂ (scCO₂) reaction medium that exhibits intermediate properties of gas and liquid, for instance, high diffusivity and solubility. Comparing with conventional chemical deposition technologies like chemical vapor deposition (CVD), SCFD has advantages on superior gap filling and structure-independent conformal deposition due to prominent solubility and diffusivity of scCO₂, which enabling conformal deposition without compromising growth rate.[1] Indeed, conformal deposition of TiO₂ was demonstrated with growth rate of ~10 nm/min onto trenches with aspect ratio of 10.[2] Hence, SCFD seems only possible solution for 3D-FeRAM that manifests thick film deposition (~100nm) onto 3D structure.
Conformal deposition of multi-component oxide like BTO is our current challenge. Since conformal deposition of BTO-SCFD is expected likewise TiO₂-SCFD thanks to the inherent nature of SCFD, we focused on the reaction mechanism to control compositional profile within the trench. Macrocavity analysis commonly used in CVD was introduced to clarify the reaction mechanism, which is a parallel-plate channel made by stacking 2 substrates with 0.5-mm-interval.[3] Film thickness profile in macrocavity gave us insight on the kinetic information of BTO-SCFD, which will be shown onsite. In brief, film thickness of BTO was only affected by Ti precursor concentration regardless of introduction of Bi precursor. It suggested that Bi₂O₃ was incorporated during TiO₂ deposition to yield BTO since oxygen-containing ligands of Ti precursor assisted Bi₂O₃ deposition. Based on these results, conformal BTO was successfully demonstrated on Si trenches (0.7-mu;m-width and 7-mu;m-depth). Stoichiometric and uniform composition was verified along the trench depth using Auger electron spectroscopy (AES), which was also an expectable combined result of conformal TiO₂ and Bi₂O₃ deposition on the trenches. Crystallization was allowed via rapid thermal anneal at 400^oC under vacuum ambient.
We plan to analyze reaction kinetics of BTO-SCFD further for smaller and deeper trenches that contribute to increased integration density of the memories. Optimization of anneal process or doping of substitute element such as lanthanum in supercritical fluid will be employed to improves ferroelectric properties.
[1] T. Momose, M. Sugiyama, E. Kondoh, Y. Shimogaki, Applied Physics Express 1 (2008)
[2] Y. Zhao, K. Jung, T. Momose, Y. Shimogaki, ECS J. Solid State Science and Technology 2 (2013)
[3] L. S. Hong, Y. Shimogaki, H. Komjyama, Thin Solid Films 365 (2000)

We demonstrate a method to tune a stable ferroelectric imprint, in SrRuO3/ PbZrxTi(1-x)O3 / ZnO/ SrRuO3 heterostructures based on the coupling between the non-switchable polarization of ZnO and the switchable polarization of PbZrxTi(1-x)O3. We observe that the ferroelectric imprint varies linearly and that, simultaneously, the switching times change over 6 orders of magnitude by varying the ZnO thickness. The ferroelectric switching dynamics was analyzed in terms of the Kolmogorov-Avrami-Ishibashi (KAI) model and nucleation limited switching (NLS) model. From the analysis we found that the dimensionality of the domain growth was much lower for the higher coercive field bias, compared to that of a film without ZnO. Moreover, the switching activation energy increases logarithmically with the thickness of ZnO for the higher coercive field bias, whereas for the lower coercive field bias its remains almost constant. From our above analysis we infer that for the higher coercive field bias the switching phenomenon is controlled by domain nucleation while for the lower coercive field the switching phenomenon is governed by domain growth.
In summary, the demonstration of the tuning of the ferroelectric imprint can lead to higher retention times in ferroelectric field effect transistors and also pave a way for a new generation of kinetic memories.

Ferroelectric materials and ferroelectric random access memories (FeRAM) are promising for future data storage due to their high speed, low power, and high reliability. To investigate the influence of domain and domain boundary microstructure on such properties, High-Speed Piezo Force Microscopy (HS-PFM) has been implemented for mapping and manipulating the ferroelectric domains of PZT and BiFeO₃ thin films. In both cases, domains with polarization vectors in and out of plane are present, but traditional PFM measurements can only interrogate one orientation at a time. Here, both the Out-Of-Plane (OP) and In-Plane (IP) polarization vectors are mapped simultaneously, enabling 3-d analyses of domain configurations. By measuring as a function of bias or poling time, switching dynamics are also resolved in 3-dimensions. Nanoscale resolution maps of a range of parameters result, including coercive fields for switching in certain directions, piezo-coefficients (d₃₃) and their variation depending on neighboring domain orientations (i.e. the local strain state), deterministic switching pathways, etc. Such insight into materials properties at the nanoscale is crucial for engineering future non-volatile data storage systems, particularly for optimizing bit consistency, reliability, switching power consumption, and speed.

There is growing interest in developing magnetic nanostructures for energy-efficient non-volatile memory and logic devices. In devices that use domain walls (DW), it is essential to understand how to achieve steady, predictable DW motion [1]. In this study, we explore the effect of line edge roughness (LER) on DW motion using micromagnetic simulations. We characterize its dependence on whether the nanowire has perpendicular magnetic anisotropy (PMA) or in-plane magnetic anisotropy (IMA), and on whether the DW is moved by a spin-polarized current or by an external magnetic field.
Using an SEM image of a fabricated wire, we identify the peak spatial frequencies along the wire edge. With an LLG equation solver, we simulate a nanowire for each of those LER spatial periods individually to see the effect on current-driven and field-driven DW motion in IMA and PMA nanowires. We compare and predict the threshold current, threshold field, and the DW velocity for the IMA and PMA cases.
Our results show that in IMA nanowires, as the LER spatial period increases, both the threshold field and threshold current increase. When the spatial period is less than the DW width, the DW occupies multiple spatial periods. As the spatial period increases, the DW occupies fewer spatial periods and requires more energy to move into the next section of the wire. We find that in PMA nanowires, the threshold field is zero for the conditions simulated, but the threshold current decreases with increasing spatial period, flattening off after the spatial period exceeds the DW width.
Threshold currents are lower in PMA than in IMA nanowires, making PMA favorable for current-driven motion [2]. Conversely, threshold fields are lower in IMA than in PMA nanowires. We find that for current-driven PMA and field-driven IMA, variation in edge roughness along the wire is closely linked with variation in the DW velocity.
Due to the strong dependence on LER of current-driven PMA DWs and field-driven IMA DWs, we developed a process to reduce nanowire LER from 12 nm to 2 nm while preserving the magnetic quality of the wires. The nanowires were fabricated from 20 nm thick Co₆₀Fe₂₀B₂₀ using a removable bilayer resist mask of poly-methyl methacrylate and hydrogen silsesquioxane [3]. Results will be shown of wires fabricated down to 25 nm wire width. By controlling LER in magnetic wires, we can achieve reliable and repeatable DW motion in memory and logic devices.
[1] J. A. Currivan et al, IEEE Mag. Lett., 3 (2012)
[2] S. Fukami et al, J. Appl. Phys., 103, 07E718 (2008)
[3] J. A. Currivan et al, J. Vac. Sci. Tech., B32, 021601 (2014)

Noncentrosymmetric (NCS) derivatives of perovskite oxides are technologically important materials for their symmetry-dependent polarization properties [1]. Pb-free LiNbO₃ (LN)-type ZnSnO₃ with R3c space group has attracted special attention due to its theoretically predicted high spontaneous polarization (asymp; 59 mu;C/cm²) [2], and the demonstration of large remanent polarization in epitaxial LN-type ZnSnO₃ thin film (P_r asymp; 47 µC/cm²) [3] and recently, in welded-nanowire arrays (P_r asymp; 30 µC/cm²), reported by our group [4]. In this work, we show the first evidence of polarization switching in LN-type ZnSnO₃/ZnO nanocomposite thin films. Phase-pure LN-type ZnSnO₃ nanocrystals (asymp; 10 nm in diameter) were first synthesized using a low temperature solvothermal process in a polyethylene glycol/water solvent mixture and characterized in detail using XRD, SEM, TEM and Raman spectroscopy. The prototype device for polarization measurements was fabricated by depositing the as-prepared LN-type ZnSnO₃ nanocrystals onto conducting Pt-Si substrates (also serve as bottom electrodes) using a mixture of polyvinylidene fluoride (PVDF) and dimethylformamide (DMF). A dielectric filler-layer of polycrystalline ZnO was deposited by pulsed laser deposition and finally Pt top-electrodes (100 mu;m pads) were sputtered using a shadow mask. Polarization measurements of the Pt/ZnSnO₃/ZnO/Pt nanocomposite capacitors at 300K showed clear evidence of polarization switching in the hysteresis loops with a P_r of 15 mu;C/cm² at an applied voltage of 9V. Current vs. voltage measurements performed using switched triangular voltage profile also showed distinct switching behavior at a nominal switching voltage of asymp; 2.5 V, which matched well with the switching field from the polarization hysteresis loop. This polarization switching was unique to the LN-type ZnSnO₃ nanocrystals and similar measurements performed solely on ZnO/Pt-Si thin films revealed typical dielectric behavior. We record high leakage currents (asymp; 10^-2 A/cm²) and significant space-charge effects (as observed from the voltage dependent polarization loops) present in the nanocomposite films, plausibly contributed from nano-scale defects in the device. We will present in-depth analyses of the electrical and FE properties of the switching devices and discuss the future research directions to improve the device performance. Considering that the experimental validation of polarization switching in LN-type ZnSnO₃ nanocrystals is still absent, our work provides valuable information which will open new pathways for the coherent design of future memory devices based on this material.
[1] Y. Inaguma, M. Yoshida, T. Katsumata., J. Am. Chem. Soc.130, 6704 (2008).
[2]. M. Nakayama, M. Nogami, M. Yoshida, T. Katsumata, Y. Inaguma, Adv. Mater.22, 2579, (2010).
[3]. J. Y. Son, G. Lee, M. H. Jo, H. Kim, H. M. Jang, Y. H. Shin, J. Am. Chem. Soc.131, 8386, (2009).
[4]. A Datta, D Mukherjee, C Kons, S Witanachchi, P Mukherjee, small, (2014 accepted).

Influence of particle size of Tb-substituted BiFeO₃ nanoparticles on the structural, morphological, magnetic and ferroelectric properties has been studied. Sol-gel method has been employed for the synthesis of nanoparticles whereas their size has been tailored by varying calcination temperature ((450 #778;C; T4), (550 #778;C; T5), (650 #778;C; T6)). XRD patterns revealed slight distortion of rhombohedral phase (space group R3c) with Tb-substitution. Peak broadening along with peak shift has been observed with decrease in the particle size thereby confirming successful tailoring of the particle size. The average crystallite size calculated using Debye-Scherrer formula points towards the increase of crystallite size with increasing calcination temperature. Morphological analysis carried out using TEM exhibited high agglomeration owing to high surface energy of the nanoparticles. T4 has been found to possess particles having spherical morphology with average particle size of 15 nm. However, T6 exhibited mixed morphologies of sphere and faceted rectangle. The average particle size of spherical morphology has been found to be 75 nm whereas average length and breadth of faceted rectangle has been observed to be 90 and 50 nm respectively. Ferromagnetism was displayed by all the synthesized nanoparticles. However, enhancement of saturation magnetization values with decreasing particle size have been ascribed to surface to volume ratio. The contribution of uncompensated spins present on the particles&’ surface increases with increasing surface to volume ratio thereby resulting in overall enhancement of magnetization [1]. Also, the magnetic response of the system with dimensions below 62 nm is intensely size dependent due to the grain size confinement, which modifies the long range spin spiral structure of BiFeO₃ [1]. Ferroelectric behavior has been found to decay with increasing particle size. Saturated ferroelectric loop with saturation polarization value has been observed for T4. While T5 and T6 exhibited significant change in P-E loop indicating highly lossy behavior with low values of breakdown voltage. Thus, study indicates enhanced multiferroic properties for smaller particle size; thus depicting a strong correlation of size and multiferroism.
Reference
[1] Park, T. J., Papaefthymiou, G. C., Viescas, A. J., Moodenbaugh, A. R., & Wong, S. S. (2007). Size-dependent magnetic properties of single-crystalline multiferroic BiFeO3 nanoparticles. Nano letters, 7(3), 766-772.

High on-off ratio, nonvolatile and low switching energy in ferroelectric tunnel junctions (FTJ) which consists of an ultrathin ferroelectric tunnel barrier sandwiched by two metal electrodes make it a promising candidate for futuristic memory devices. Intensive researchs have been focused to achieve the on-off ratio for FTJs, with the tunnel electroresistance (TER) reaching up to 10,000%. Increasing the asymmetry of the electrode/ferroelectric interface from electrostatic effect and inserting a phase transition material sensitive to electronic doping concentration adjacent to ferroelectric layer in FTJs have been demonstrated effective to improve the TER. However, a fundamental understanding of the role of each interface in a FTJ multilayer structure is still lacking. Here, a systematic study of FTJ performance with structures of increasing complexity from simple trilayer structure (Nb:SrTiO₃/BaTiO₃/Pt), followed by insertion of thin intermediate layer (Nb:SrTiO₃/BaTiO₃/La_1-xSr_xMnO₃/Pt) and with additional modified electrodes (Nb:SrTiO₃/BaTiO₃/ La_1-xSr_xMnO₃/ La_0.67Sr_0.33MnO₃ /Pt) with Sr doping concentration x ranging from 0.1 to 0.7 was investigated. With increasing complexity of the FTJ structure, TER improves while the switching voltage remains constant independent of the structures. Furthermore, with the same FTJ structure, the TER remains the same for increasing Sr doping concentration with larger on-state and off-state resistance. Our results prove that the band offset at each heterojunction in FTJs controls the tunneling width and hence the TER ratio without disturbing the switching properties of ferroelectric layer. In addition, additional band offsets increases the actual on and off-state resistance with the lower bound limited by the ferroelectric layer resistance. Our experimental results provides a guide for the FTJ design for a large TER ratio as well as a controllable on and off-state resistance which are essential requirements for the future integrated memory devices.

Leakage current in ferroelectric capacitor is an important parameter that should be taken into account in ferroelectric random access memory (FeRAM) developing.
Experimental study of current-voltage (I-V) characteristics of some ferroelectric thin films frequently founds regions with an apparent negative differential conductivity. To describe this phenomenon Dawber and Scott have suggested the diffusion current model [1]. However as it was shown earlier [2], this model does not fully describe real I-V characteristics.
In this report we propose a different approach taking into account the polarization relaxation. The polarization relaxation in thin ferroelectric films can really reach about tens percent. Thus, in spite of the pre-polarization of the ferroelectric structure before the measurement, the total current in the structure contains the leakage current and the polarization recovery current components.
We have shown that the probability density of the Weibull distribution simulates well the polarization recovery current. A maximum value of the polarization recovery current is observed in the vicinity of the coercive field.
A technique is proposed that enables to exclude a polarization recovery current component from the I-V data and to obtain the true leakage current in ferroelectric structures. A method of recovery charge determination at different voltage ramp speed is discussed as well.
References
1. M. Dawber, J.F. Scott . J Phys: Condens Matter. 16, L515-L521 (2004).
2. Yu. Podgorny, A. Sigov, A. Vishnevskiy, K. Vorotilov. Ferroelectrics. 465, 28-35 (2014).

Domain walls (DWs) and DW based memory and logic devices such as racetrack memory and spin transfer torque memory have been intensively studied in recent years. Domain walls in a ferromagnetic thin film wire with rectangular cross-section adopt transverse wall (TW) or vortex wall (VW) geometries depending on both the magnetic material and the wire width and thickness. DWs can be driven by a spin current or a field, and the maximum velocity of the DW in both cases is limited by Walker Breakdown (WB) at which the DW structure becomes unstable. WB therefore limits the operating speed of DW devices. Here we demonstrate that tapering the edges of the wire can delay the onset of WB, potentially providing a method to control DW dynamics.
Edge taper in magnetic wires can be introduced by using a bilayer resist with an undercut profile. This reduces edge roughness and leads to a tapered edge profile. We found that sputtered thin film wires had a trapezoidal-like cross section after lift-off, and a taper ratio of 50:1 could be achieved in 10 nm thick NiFe wires using a methyl methacrylate-poly methyl methacrylate (MMA-PMMA) bilayer resist, in which the lower MMA layer is undercut during development.
Based on the experimental results, micromagnetic simulations were done on both rectangular wires and trapezoidal wires to study the effect of edge taper on DW configuration formed in the wires. With an increase of the edge taper, a TW was energetically more favorable than a VW compared to the case of rectangular wires of the same thickness and average width. This is attributed to the fact that the demagnetization energy at the edge of the trapezoidal wires is affected by the taper. With the increase of the taper, demagnetization energy of a TW decreases much faster than the demagnetization energy of a VW.
The effect of tapering on the current-driven dynamic behavior of domain walls was examined. Tapering increases both the spin current at which Walker Breakdown occurs as well as the DW velocity at the beginning of the Walker Breakdown, raising it by 30% for the case examined here, and therefore enabling faster subthreshold DW motions. Although other methods have been demonstrated to increase the critical current for Walker Breakdown, such as adding periodic current shunt pads or patterning complex comb-like structures, the edge taper demonstrated in this article provides a convenient and easily implemented strategy to tailor domain wall structures and current-driven dynamics in magnetic wires with relevance to domain wall memory and logic devices.

We have used a series of focused ion beam irradiations to determine the spatial location of the conductive filaments in TaOx memristor devices. These devices were irradiated using high-energy silicon ions from the microbeam on the Sandia National Laboratories Tandem accelerator. We determined that the conductive filaments that led to the hysteretic IV curves characteristic of memristor operation were located at the edges of the device structure. These initial experiments were limited by the spatial resolution achieved with a focused ion beam of approximately 1 um in diameter. We have developed a similar experiment to improve on the spatial resolution by raster scanning a focused ion beam obtained from our newly developed nano-Implanter (nI). The nI is a 100 kV focused ion beam system capable of achieving a spot size of < 20 nm on target which includes a mass velocity filter and can provide ion beams from approximately 1/3 of the periodic table using liquid metal alloy ion sources. Using the nI we have confirmed the location of the conductive filaments to the edges of the device and have determined that device topology dictates where conductive filaments are created during the electroforming process. Additionally, we have evidence that shows drastic changes in resistance-state of the device which can be effectively attributed to single ion strikes. Even though TaOx films have been shown to be radiation-hard to high levels of displacement damage, our results suggest that the effect of total ion fluence versus deterministic targeting of sensitive areas should be re-visited. From the literature available, it is evident that there are several other aspects of memristor operation that remain not fully understood. To further our understanding of memristor operation, we will target individual areas sensitive to ion beam irradiation in order to modify the operation of TaOx memristor devices. For these experiments we will employ the nI&’s direct write lithography system and improved spatial resolution to reliably target regions of interest with a spatial resolution of ~10 nm.
Sandia is a multi-program laboratory operated by Sandia Corporation, a Lockheed Martin Company, for the United States Department of Energy's National Nuclear Security Administration under Contract DE-AC04-94AL85000.

The continuous development of the information industry is leading to a growing demand for new-generation data-storage technologies. Recently, increasing attention has been paid to applications in memory devices based on organic materials: thanks to the advantages of good scalability, flexibility, low cost and ease of processing, organic memories seem to be a promising alternative or supplementary devices to conventional inorganic memory technology. In particular, resistive memory devices have been attracting significant interests due mainly to their simple structure. The basic feature of an organic resistive memory is to exhibit a bistable behaviour: a such kind of device possesses two stable resistance states which can be reversibly modulated by external electrical stimulation. Resistance bistability has been found in different organic materials.
This work presents a non-volatile resistive memory device based on a new combination of materials. Each memory element is obtained by sandwiching a hybrid organic/inorganic active layer between two metal electrodes. The active layer is a nanocomposite material made of an organic semiconductor and metal nanoparticles (NPs). In particular, a perylene-derivative with extraordinary stability in air, namely ActiveInk^TM N1400 (Polyera), is employed as organic semiconductor, while gold and aluminium (deposited in different ways) are tested for defining the NPs layer in the sandwiched structure. In a first step, the memories were fabricated on glass substrates, later all the technology has been transferred successfully on plastic substrates.
The fabricated devices showed a reproducible behaviour and good resistive switching proprieties, with on/off current ratio usually ranging around 10³-10⁴ and remarkably long retention times of more than 10⁷ seconds (6 months). This behaviour was found over tens of different fabricated devices. Moreover, the devices have been tested and stored in air for the whole duration of the investigation, and they showed more than 1 year of global lifetime.
In order to shed the light into the switching mechanism, a morphological characterization of the hybrid nanocomposite was performed. It will be shown that such a resistive switching seems to be induced by the formation of metallic filaments inside the hybrid matrix, and that this behaviour could be triggered by the presence of metallic nanoparticles dispersed into the organic layer.
Finally, the integration of the memory elements with electrical sensors was carried out. Since resistive memories respond to an applied voltage by a non-volatile change of the conductivity, an external stimulus from a sensor element can be used to trigger the memory device to switch. In particular, if a memory element is connected in series with a piezoresistor, the resistivity change in the piezoresistor, induced by an external pressure, can be used for triggering the memory, creating a novel sensor-memory system.

Resistive memory materials and devices (often called memristors) are an area of intense research, with metal/metal oxide/metal resistive elements being one of the important examples of such devices. Electroforming (the formation of a conductive filament in the metal oxide layer) represents one of the often necessary steps of resistive memory device fabrication that results in large and poorly controlled variability in device performance. In this contribution we present a numerical investigation of the electroforming process as well as experimental results related to the study of ion implantation effects on filament formation and device performance. In our model, drift and Ficks and Soret diffusion processes are responsible for movement of vacancies in the oxide material. Simulations predict filament formation and qualitatively agreed with reduction of the forming voltage in structures with a structured top electrode. Experimentally the effect of ion implantation (with Ti, O and N ions of various dosages and energies) on the forming behavior and switching of the Ti/TiO₂/Pt resistive memory devices was studied. The forming and switching results of the study are compared with numerical simulations and show a possible pathway toward more repeatable and controllable resistive memory devices.

Nonvolatile memories based on magnetic media have been used for decades and they still serve as the major storage media. Solid state memories based on silicon have successively expanded their territory from volatile to nonvolatile memories over the last two decades. To sustain this growth, next generation memory platforms have critically been considered as the silicon-based memories will confront their limits in attainable memory density and power consumption. Two-terminal oxide-based resistive random access memories (RRAM) are garnering enormous interest for the development of next generation nonvolatile memory beyond current Si-based memory technology.
We have previously demonstrated a unipolar nonvolatile memory with silicon oxide (SiO_x) for the first time [1]. SiO_x is among the most common and low-cost material in the semiconductor industry, which can be formed by various ways. These SiO_x memory elements have shown desirable performance metrics such as excellent switching behavior by conducting nanofilaments forming at a sub-5-nm scale [2,3]. We fabricated highly transparent memory and 1-kilobit one diode-one resistor crossbar devices using SiO_x material [4,5], which show low energy consumption (~10^-3 J/Gbit), multi-bits ability, and high ON-OFF ratio (up to 10⁷) without a compliance current.
Futhermore, we recently developed an industry-applicable fabrication approach to new resistive random access memory platform employing a nanoporous SiO_x material [6]. This exhibits reversible memory states, which outperform the switching ability of any other unipolar memory. It is the first implementation of a nanoporous material to memory devices with the industry-demanding performance metrics. The nanoporous-based material is a new concept for a memory structure. The achieved performances are coming from the unique nano-porosity of SiO_x, in contrast to all other memory platforms based on non-porous materials. Through the nanoporous material, many of the critical requirements for future nonvolatile memory can be met such as reliable nano-scale memory filament formation, high memory stability, low power consumption, and multi-bit capability For quantitative measure, greatly improved rewriting times (100' more, ge; 10⁵ cycles), lowest-power memory forming (13'lower), high working temperature (up to 100°C tested), the lowest power consumption in writing, and multi-bit memory state (up to 9 bit, highest value to date) are demonstrated. The nanoporous SiO_x memory can be fabricated at room temperature and operated without any compliance currents that often require in the oxide-based memories.
References
1. Yao, J et al., Nano Letters 2010, 10, 4105-4110.
2. Yao, J et al., Sci. Rep. 2012, 2, 242.
3. Wang. G et al., ACS Nano 2014, 8, 1410-1418.
4. Wang. G et al., Adv. Mater. 2013, 25, 4789-4793.
5. Yao, J et al., Nat. Commun. 2012, 3, 1101.
6. Wang. G et al., accepted to Nano Letter. 2014.

The resistance switching of conduction-bridge resistive random access memory (CB-RAM) is attributed to the solid electrolytic behavior and/or ionic conductivity of the material [1, 2]. Being with flexible structure, enormous variation in properties, and almost unlimited ability for doping and alloying the chalcogenide glasses are promising materials for CB-RAM, especially with metal doping. Their void-rich and flexible structure promotes the mobility of the metal ions and accommodates the electrochemical redox reactions, while the mobile metal ions form a conduction bridge under an electrical bias. Copper doped Ge₂Sb₂Te₅ (Cu-GST) and GeTe were used as reactive electrode (to provide conductive ions) [3] and as a solid electrolyte layer [4] in CB-RAM devices. In this work, Cu-GST films with different Cu concentrations were prepared. Their electronic properties and conduction kinetics were investigated. Our findings would provide a guideline for proper material selection and high performance memory design.
A series of Cu-GST films were deposited with Cu concentration ranging from 0 to 80 atm%. Experimental results showed the Cu doping led to remarkable deformation of the crystal structure. With small amount of Cu, the crystallization process of the doped GST became harder, evidenced by the higher crystallization temperature and larger activation energy. When Cu content excessed 20 atm% the doped GST was not suitable for phase change memory application. Material studies revealed that Cu ion entered into GST in Cu⁺ state and generated localized charge trap in bandgap. Meanwhile, the Fermi energy shifted towards lower binding energy compared to the undoped GST. This electronic structure modification would affect operation performance of memory devices.
Temperature dependent current-voltage curves were measured to address the charge transportation kinetics, which is closely linked to the filament forming and rupture processes in CB-RAM. Our experimental results suggested Poole-Frenkel dependence. Cu doping greatly reduces the charge conduction barrier in Cu-GST films. When Cu concentration excessed 20 atm %, the activation energy value decreased to less than 0.1 eV, implying that the quasi-intrinsic semiconductor nature was lost and the Cu-GST turned into a solid electrolyte. Remarkable current jump-up was observed on high level-doped Cu-GST, demonstrating the conduction bridge formation.
1. I. Valov, M. N. Kozicki, “Cation-based resistance change memory”, J Phys. D: Appl. Phys., 46: 074005 (2013).
2. R. Waser, M. Anno, “Nanoionics-based resistive switching memories”, Nat. Mater., 6: 833 (2007).
3. F. M. Lee, et al., “A novel conducting bridge resistive memory using a semiconducting dynamic E-field moderating layer”, IEEE VLSI, (2013).
4. S. J. Choi, et al., “Multibit operation of Cu/Cu-GeTe/W resistive memory device controlled by pulse voltage magnitude and width”, IEEE EDL, 32(3): 375 (2011).

Resistive random access memory (RRAM) is considered as one of the most promising candidates for high density nonvolatile memory (NVM) applications as the technology node scales beyond 14 nm [1]. Due to complementary metal-oxide-semiconductor (CMOS) process compatibility, fast switching speed and excellent performance; transition metal oxide RRAM devices is attracting increasing attention in recent years [2, 3]. Amongst the other metal oxides, TaO_x has become a prominent material for RRAM research due to its high endurance and fast switching speeds [4].
In this work, a forming-free and high thermal stability TaO_x based RRAM cell is demonstrated with low operation voltage and large resistance window. TaO_x based RRAM devices with different electrode materials and rapid thermal annealing conditions are fabricated and characterized. RRAM devices with Pt/TaOx/TiN and Pt/TaOx/Ta film-stacks were investigated in this work. For devices with TiN as top electrode (TE), the initial resistance is at OFF state, thus a forming process is needed prior to subsequent switching operations. For devices with Ta as TE, the initial resistance is at ON state, negating the need for a forming process. This is attributed to the dielectric thinning effect caused by the interfacial reaction between the TaO_x and Ta layers during forming gas anneal process. At this TaO_x/Ta interface, Ta consumes some oxygen in the TaO_x layer, making the switching film (TaO_x) oxygen deficient, thus resulting in a forming-free RRAM device. In addition, with Ta as TE, smaller |V_set| and |V_reset| and wider ON/OFF ratio window are observed. Excellent thermal stability of the TaO_x films was also observed in XPS analysis for TaO_x films prepared by RTO (400°C with O₂ ambient) and RTA (400°C with N₂ ambient). This was further confirmed by the device electrical results.
[1] H. -S. P. Wong, et al., “Metal-oxide RRAM,” Proceedings of the IEEE., vol. 100, no. 6, pp. 1951-1970, 2012.
[2] K. M. Kim, et al., “Anode-interface localized filamentary mechanism in resistive switching of TiO₂ thin films,” Applied Physics Letters, vol. 91, no. 1, p. 012907, 2007.
[3] Y. S. Chen, et al., “Challenges and Opportunities for HfO_x Based Resistive Random Access Memory,” IEDM Technical Digest, pp. 717-720, 2011.
[4] J. J. Yang, et al., “High switching endurance in TaO_x memristive devices,” Applied Physics Letters, vol. 97, no. 23, p. 232102, 2010.

We present a detailed study of memory performance of titanium oxide (TiO2-x)-based resistive memories by modifying critical parameters of the films involved in the memory stack grown by reactive sputtering at room temperature. The latter enables fabrication of the films even on flexible polymer substrates. The device includes a Ti nanolayer at the Au/TiO2-x interface and it is defined by the following material stack: Au/Ti/TiO2-x/Au/SiO2/Si. We investigate the memory performance optimization of the device in terms of the Ti nanolayer thickness using as a starting point for the TiO2-x growth conditions these identified by varying the ratio of oxygen concentration to argon concentration shown in our previous results [1]. Due to the superb ability of Ti to absorb oxygen atoms from the dielectric matrix, a large amount of oxygen vacancies is created, which are crucial for the stable function of the memory devices. We observe the existence of an optimum Ti thickness that if further increased gradually degrades the resistive switching behavior. The induced interface oxide thickness is found also to affect the fluctuation of the ON/OFF processes. These findings will be discussed and correlated with Ti interfacial layer thickness and oxygen vacancy distribution in the film and will be associated with the conducting filaments diameter values obtained. In terms of electrical performance self-rectifying characteristics were recorded for all samples in the low resistance states. We then demonstrate that at least five-level resistance states could be obtained by modifying the amplitude of the voltage pulse applied on the memory cell or the compliance current, exhibiting excellent resistance uniformity and retention capability. During DC scan low power resistive switching was recorded for both SET (20 mu;W) and RESET (20 nW) processes, while for pulse voltages even lower power was achieved (1 mu;W and 1 nW respectively) for 100 ns switching duration. Conduction mechanism analysis revealed that trap-assisted-tunneling is the dominant conduction mechanism, which also strongly affects the distribution of the current during SET process. The results are supported by C-AFM measurements demonstrating the scaling potential of the larger area device discussed above.
[1] P. Bousoulas, I. Michelakaki, D. Tsoukalas, “Influence of oxygen content of room temperature TiO2minus;x deposited films for enhanced resistive switching memory performance#750;, J. Appl. Phys. 115, 034516 (2014).

As a promising alternative to conventional memories, resistive switching memory has recently attracted significant attention owing to its high speed, low power consumption and excellent scaling potential. Resistive switching (RS) cells, usually in a metal-oxide-metal (MOM) structure, exhibit reversible and dramatic changes in their cell resistance between high and low resistance states (HRS and LRS) under electrical biases. Despite numerous studies performed on resistive switching behavior over the last few decades, there are still many unknowns about the underpinning mechanism, presenting uncertainties in the eventual scaling limit, read/write speed and device endurance.
In this report, we present a RS mechanism study of a Pt/TiO₂/metal (metal: Pt or Au) cells with the aid of atomic force microscopy (AFM) mostly focusing on the impact of interfacial bonding between TiO₂ and metal. TiO₂ was selected because of its wide availability of relevant studies and known chemical identity of its CFs. It can be speculated that the AFM-based cell only has one or a few CFs at most given that the cell dimension (< 20 nm in diameter) is comparable to the reported size of a CF (~10 nm in diameter). A series of observations described in this report suggests that the bonding nature at the ‘active interface&’ largely determines the RS state once a URS is activated. The active interface refers to the TiO₂/M interface where an anodic bias is applied for the preceding set process. The other interface is believed to maintain an Ohmic-like contact. The following lists a brief summary of the observations made in this study: 1) When an AFM-based Pt/TiO₂/Pt cell is in LRS, the adhesion force at its active interface is always significantly higher than that at the initial contact or in HRS; 2) Once a tip-substrate contact (between a Pt/TiO₂ tip and a Pt substrate) forming an LRS cell is mechanically separated, the cell became an HRS even after the tip is re-attached to the same location of the substrate. The cell then behaves like a normal HRS cell and can be set to an LRS again by an electrical bias; 3) When an LRS cell is electrically reset switched to an HRS, the adhesion returns to the initial low adhesive state. Furthermore, this is the case regardless of the reset switching polarity. These observations collectively support the supposition that the unipolar switching behavior is dominated by the interactive/adhesive nature at the active interface. Further, the nature of the adhesion at the active interface of an LRS cell is identified to be a ‘chemical&’ bonding (not a van der Waals interaction or electrostatic force), which is also found strongly dependent on the oxygen activity and metal substrate. These suggest that the URS mechanism of metal oxide-based RS cells can be more completely understood through research focused on the chemical reactions involving oxygen exchange at the active interface.

Recent advances in metal oxide-based Resistive Random Access Memories revealed their powerful alternative to replace classic transistor based memories due to their fast non-volatile ns-switching and scalability. To date, memristance is typically characterized via hysteretic current-voltage profiles, however, the mixed anionic-electronic defect kinetics that can quantitatively describe the material characteristics for the oxide constituents are still missing. The latter defines the devices` resistive switch threshold bias, switch speed and scalability. For this study, we fabricated 2-terminal Pt|SrTiO_3-δ|Pt cross-bar array structures as a model system in terms of its mixed defects which show stable and reproducible resistive switching. We show that chronoamperometry and bias-dependent activation energy measurements are powerful methods to gain complementary insights into material-dependent carrier and diffusion characteristics for mixed conducting oxides in memristors with respect to field strength and bias history. We innovatively apply chronoamperometry for mixed anionic-electronic Pt|SrTiO_3-δ|Pt memristors and successfully demonstrate the separation of the capacitive, memristive and limiting current contributions towards the equilibrium states. We found a specific threshold voltage of 1.2 V at an electric field strength of 1.9×10⁶ V/m for which the resistive switching mechanism gets thermodynamically activated at room temperature for SrTiO_{3- δ} thin films. The Memristor#8209;based Cottrell analysis is proposed for analysis of the diffusion kinetics for memristors operating on mixed oxygen anionic-electronic carriers. We found faster diffusion kinetics at higher electric fields with oxygen diffusion coefficients ranging from 4×10^#8209;16 m²/s to 3×10^#8209;15 m²/s during a bias increase from 1.2 V to 3.8 V. The bias-dependent activation energy measurements revealed a severe decay of activation energy from 1.4 eV down to 1.16 eV for higher biases and an asymmetry with respect to bias polarization as the Schottky barrier is lowered. Based on the activation energies, a predominant p-type electronic conduction balanced by oxygen vacancies of the oxide is a reasonable model to account for the resistive switching in the Pt|SrTiO_3-δ|Pt bits in air. These complementary measurement methods for memristors demonstrate an extended strategy to analyze memristive oxide device kinetics.¹ Further, we discuss the influence of moisture on the resistive switching response, memristance and conductivity. We report a conductivity change of factor of two at elevated temperatures up to 400 °C. Here, bulk vs. surface sensitivities towards humidity are discussed for resistive switching of Pt|SrTiO_3-δ|Pt bits.
References
1) F. Messerschmitt, M. Kubicek, S. Schweiger, J.L.M. Rupp. Memristor Kinetics and Diffusion Characteristics for Mixed Anionic-Electronic SrTiO_3-δ Bits: The Memristor-based Cottrell Analysis Connecting Material to Device Performance. Adv Funct Mat 2014 (in press)

Resistive switching (RS) behavior of various materials are widely investigated for their non-volatile memory and logic applications due to its scalability, low power consumption, fast switching speed, fabrication simplicity, long retention time, 3D integrability and CMOS compatibility¹. Generally, a RS device has a structure consisting of an insulating layer sandwiched between two metal electrodes and switches between a low resistance state(LRS) and a high resistance state(HRS). Ionic migration based RS characteristics has been widely studied in a variety of transition metal oxides due to their wide range of electrical properties and doping controllability without using any impurities. Recently, RS of metal nitrides such as AlN, Si₃N₄ and NiN are reported^2,3.
Proof-of-principle AlN resistive switching memories are fabricated on a thermally grown 1µm-thick SiO₂ on Si substrate. As a bottom electrode, a 100nm Ti/W metal alloy is sputtered with DC sputtering of a Ti/W(10:90) target. A 12nm AlN thin film is deposited with a hollow cathode plasma-assisted atomic layer deposition(HCPA-ALD) technique using Trimethylaluminium(TMA, Al(CH₃)₃) and N₂:H₂(50:50 SCCM) gas mixture at a wafer temperature of 200°C. Finally, 100nm Ti top electrode is deposited by sputtering through a shadow mask to complete device fabrication. As-deposited AlN films are verified to exhibit stoichiometric hexagonal polycrystalline structures with less than 1% oxygen and carbon impurities.
Electrical characterization of AlN RS devices are performed through current-voltage(I-V) measurements. A dc voltage bias is applied from the top Ti electrode while keeping bottom Ti/W electrode at zero potential. With proper electroforming step, AlN resistive switching device is shown to exhibit a bipolar resistive switching behavior with an opposite set and reset voltage bias polarity. The hysteretic current versus voltage(I-V) characteristic of an AlN resistive switching device is observed with set voltages ranging between 4 to 6V and reset voltages ranging between -2 to -5V with an R_on/R_off contrast ratio greater than 10. The electrical current through the devices exhibit a self-compliance behavior, resulting in high endurance and repeatable I-V characteristics with cycling. The slope of the log(I) vs log(V) graph shows a linear relationship between voltage and current at LRS indicating that the conduction mechanism for LRS is ohmic. The conduction mechanism of the HRS is also ohmic at low voltages, while a space charge limited conduction (SCLC) mechanism is observed at increased applied voltages. The combined ohmic and SCLC mechanisms together indicate that the RS mechanism is due to the formation and rupture of conducting filaments in the AlN layer. Retention times more than 10⁵ seconds is observed for devices at both states.
[1] R. Waser, et al, Nat. Mater. 6, 833 (2007)
[2] H. D. Kim, et al, J. Appl. Phys. 109, 016105 (2011)
[3] C. Chen, et al, Appl. Phys. Lett. 97, 083502 (2010)

Recently, break-gaps formed in individual carbon nanotubes (CNTs) [1,2] have been used to create nano-sized non-volatile memory devices. In particular, Yao et al [1] was able to form a conducting Si filament within a SiO₂ film to connect gaps between broken CNTs, thus creating a resistive switch. While these switches use inexpensive materials, they cannot be scaled for manufacturing because the distribution of break-gap sizes will vary, the current carrying limit of CNTs is low, and control over the placement of individual CNTs is difficult. In this study, we fabricate two-terminal CNT network devices on top of SiO₂, using a dip-coating method [3] that allows control over the placement of CNTs.
Using transport measurements and Raman spectroscopy, we investigate the physical mechanisms behind the formation of the initial break-gap and the breaking of the CNT-SiO₂-CNT device. We sweep a voltage across the device until the CNT network undergoes Joule breakdown, creating a physical gap within the network. While the gap within an individual CNT network may vary from ~10 - 40 nm, the minimum gap size between different CNT networks fluctuates by ± 3 nm. To prevent premature breakdown from oxidation, all measurements are performed in vacuum (10^#8209;5 Torr). After the initial breakdown of the network, we observe a coalescence induced mode (CIM) at ~1860 cm^#8209;1 in the Raman spectrum, which is characteristic of linear sp hybridized carbon chains [4]. We note that the temperature needed to induce the coalescence of CNTs is ~2000 K. After breaking the CNT network, we sweep the voltage back to zero where we observe a sudden increase in current at a voltage ~ 50 - 80 % of the breakdown voltage. We can reliably switch the device multiple times between high and low resistive states. Each time we are able to heal the conductivity, in some cases up to ~50 % of its original value. During the reset to the low resistive state, thermal modeling indicates that the filament reaches temperatures of ~500 - 800 °C, the oxidation temperature of carbon.
[1] J. Yao et al., Nano Letters10, 4105-4110 (2010)
[2] F. Xiong et al., Science332, 568 (2011)
[3] X. Xiong et al., Small3, 2006-2010 (2007)
[4] C. Fantini et al., Physical Review B73, 193408 (2006)

Key Products: adhesive, epoxy resin, 3D-IC integration
A high heat resistance adhesive material employing solid epoxy and alicyclic epoxy containing epoxy resin has been investigated and implemented to the ultra-thinned wafer stack for the three-dimensional (3D) Wafer-on-Wafer (WOW) processes (1)-(3). In this study, the viscoelastic characteristics and heat resistance as a function of the temperature were evaluated. Viscosity was decreased with increasing temperature down to 300cps at around 150°C and increased by the polymerization at higher temperature above 150°C, which is lower temperature than that of Benzocyclobutene (BCB), e.g. 250°C and 60 minutes (4), (5). The glass transition temperature and storage elastic modulus measured by the dynamic viscoelasticity were 195°C and 2.3GPa at 25°C, respectively. The curing shrinkage ratio was low as 2-3%. No degradation of chemical resistance for H₂SO₄, K₂CO₃, H₂O₂ ,IPA, [(CH₃)₄N]⁺[OH]^- (Tetramethyl-ammonium hydroxide: TMAH) was demonstrated. The heat resistance was estimated by weight loss for the various ramp rate ranged from 2°C/min to 6°C/min. Activation energy was around 1.75eV (169kJ/mol). Wafer was thinned down to 10mu;m and stack onto another wafer after spin coat of 5mu;m-thick adhesive material. No voids were seen after heat treatment of 200-250°C for 10 to 30 minutes. Further characteristics varied with the contents of initiator of cationic polymerization will be described.
(1)N. Maeda et al., Proc. Advanced Metallization Conference 2008, Eds. M. Naik, R. Shaviv, T. Yoda, and K. Ueno, Mat. Res. Soc., p. 501, 2009.
(2)Y. S. Kim et al., IEEE IEDM Tech. Dig., p. 365, 2009.
(3)T. Ohba et al., Microelectronic Eng. Elsevier, 87, p. 485-490, 2010
(4)M. E. Mills et al., Microelectronic Eng. Elsevier, 33, p. 327-334, 1997
(5)M. Woehrmann et al., “New Polymers for special applications" InTech, p.113-138, 2012

As new horizons and applications arise for flexible electronics, the demand for flexible systems intensifies. Applications ranging from biomedical to consumer electronics impose some specifications to be met in this new electronics generation, such as high flexibility, reliability, performance, and integration density. Great progress and milestones have already been achieved through different approaches utilizing polymeric substrates and polymeric devices. However, there are many challenges along the way. This is expected with the attempt to replace the well-established semiconductor industry processes, and material systems with low-cost processes (garage fabrication). Other approaches exist, such as utilizing expensive silicon on insulator (SOI) or unorthodox silicon (111) wafers and peeling off the thin silicon nano-ribbons with or without devices. This solves the thermal budget limitations partially and low performance associated with organic electronics but at the expense of the higher costs and limited integration density. To this end, we provide a pragmatic approach to complement current research which transforms bulk silicon into a flexible fabric hosting devices. Our approach follows an etch-protect-release-recycle process to peel off an ultra-thin flexible sheet with pre-fabricated devices from low cost bulk mono-crystalline Si (100), commonly used in industry. This process capitalizes on the semiconductor industry as opposed to replacing it and eliminates the higher costs. Furthermore, we utilize our demonstrated process to build up various device components required for building flexible memory modules, essential elements in all electronic systems. This is a necessary step towards taking flexible electronics research into demonstration of completely flexible stand-alone electronics systems. In this work, we discusses our generic transformative process for creating flexible Si fabrics with various demonstrated devices required for building a flexible memory module. We also report fabrication and characterization of all necessary elements required for silicon based fully flexible memory module. Devices include DRAM cells (MIMCAPs), NVM cells (ReRAM and FeRAM), and select transistors (MOSCAPs to study the gate stack) to be used in crossbars arrays architectures, all built on thin flexible silicon fabric. This is an important step forward towards achieving completely flexible stand-alone electronic modules while capitalizing on the perks associated with the well-established silicon based semiconductor industry. Finally, we discuss the limitations imposed on these memory modules on flexible silicon platform in terms of frequency limitations for MOSCAPs and MIMCAPs, mechanical limitations and performance variations for NVM cells, and reliability aspects related to flexible platform and the associated process&’s effect on device performance.

The novel strain-induced morphotropic phase boundary in BiFeO₃ has attracted resurgent interest as a promising lead-free multiferroic with its pivotal developments including electromechanical and magnetoelectric coupling[i], domain wall conductivity[ii] and bias induced semiconductor-insulator transitions[iii]. In order to develop devices and applications based on such morphotropic phase boundary system, precise control of mixed phase regions consisting of T-like and R-like phases is necessary. Here, we explore the mechanism of force induced phase transitions in this morphotropic system. By precisely adjusting the applied force in AFM measurements, we have characterized the phase transformation from T- to R-like phases in detail and achieved full control over the reversible nanoscale phase transformation. Extraordinary soft elastic behavior is observed during the phase transition with values of Young&’s modulus being two orders of magnitude lower compared to typical ionic solids. Our findings open new pathway to controllably write ferroelectric memory bits by mechanical force in data storage devices.
[i] K. T. Ko, et al., Nat. Commun. 2 (2011).
[ii] J. Seidel, The Journal of Physical Chemistry Letters 3, 2905 (2012).
[iii] C. H. Yang, et al., Nat Mater 8, 485 (2009).

The programmable metallization cell (PMC), which is based on the electrochemical control of nanoscale quantities of metal in thin films of solid electrolyte, shows great promise as a scalable and manufacturable solid-state memory technology.
Material parameters associated with the ChG film are not well known and has therefore yet to be developed to become able to capture the electrical behavior of the PMC. In continuous of our previous efforts in parameterizing Ge₃₀Se₇₀ chalcogenide in vertical PMCs designed and fabricated at Arizona State University, in this paper we present a new transient method for characterizing the mobility of electron hole carriers generated in irradiated Ge₃₀Se₇₀ chalcogenide. Finite element simulations are performed with Silvaco&’s numerical simulator ATLAS on a three-dimensional PMC structure.
The new test method involves charging an undoped PMC to a fixed voltage, next disconnecting the PMC from the voltage source and leaving the top plate of that floating. Then PMC is irradiated exactly between its electrodes, using a photon beam with power density of 2.7mW/cm² and wavelength of 324nm, which generates carriers in the Ge₃₀Se₇₀ chalcogenide. The carriers drift as a result of the electric field in the PMC electrolyte. The voltage across the PMC electrodes decays as the carriers transport across the chalcogenide. The resulting voltage decay transient is measured. This voltage decay can be explained by the reduction in the electric field across the electrolyte as the carriers transport through that.
The rate of voltage decay depends on the rate at which carriers move through the Ge₃₀Se₇₀ chalcogenide, which is dependent on both the electric field and the carrier mobility. Since the holes are much more mobile than electrons in the chalcogenide, they drift much faster and neutralize the negative charge on the bottom plate first. The rate of voltage decay also depends on the generation rate of electron hole pairs in the chalcogenide. These processes are validated with simulations.
Key words: chalcogenide, electrochemical memory cell, ECM, irradiation, parametric model, programmable metallization cell, PMC, mobility, nano-ionic memory, solid-state electrolyte

Sb₂Te₃ is a small band gap (0.28 eV) semiconductor of interest as a topological insulator, a thermoelectric material and a phase change compound for application in Phase Change Memories (PCM).
PCM are data storage devices based on the reversible phase switch induced in the active material by ns current pulses; information is stored by relating the binary codes to the significantly different resistivity values of the material crystalline and amorphous states.[1]
Ge-doped Sb₂Te₃ has been recently reported as a more interesting alloy for PCM applications, granting high speed, low power memory devices.[2] In particular, when obtained as nanowires (NWs), Sb₂Te₃ can exhibit a lower melting point and yield lower reset currents in comparison with thin film-based, conventional PCM cells. Moreover, this kind of nanostructures allow a defect-free scaling down in the fabrication of high performing PCM devices, often out of the range of the top-down processes.
In this work we present a study on the self assembled MOCVD grown Ge-doped Sb₂Te₃ NWs, obtained on SiO₂ substrates through the VLS mechanism assisted by Au catalyst nanoparticles.
The synthesized NWs were found to exhibit an unexpected crystal structure. The new polymorph was characterized by combining electron and X-ray diffraction and Scanning Trasmition Electron Microscopy High Angle Annular Dark Field imaging.
The grown NWs are also featured by an ordered array of twin defects equally spaced along the whole wire length, forming a so called twin super lattice (TSL), never observed before in this class of compounds.
The thermodynamic stable Rhombohedral R -3m (S.G. 166) phase of Sb₂Te₃, having lattice parameters a = 0.423 nm and c = 3.046 nm, consists in 15 atomic planes stacked along the c-axis. The new polymorph was found to crystallize in the trigonal system, space group P-3m (S.G. 164), with lattice parameters a = 0.426 nm and c = 1.060 nm and only 5 atomic planes stacked along the c-axis.
Ab initio density functional theory calculations were employed to investigate the existence of the new polymorph and its stabilization in form of NW. The theoretical results, combined with the structural information, can explain the appearance of the TSL.
[1] A. L. Lacaita, "Phase-change memories", phys. stat. sol. (a), Vol. 205, pp 2281-2297, September 2008.
[2] Z. Wu, "Controlled recrystallization for low-current reset programming characteristics of phase change memory with Ge-doped SbTe", Appl. Phys. Lett., Vol. 99, pp 143505-143505, October 2011.

Spintronics research offers the exciting possibility of using the spin of electrons as a means to send and store information. Gadolinium nitride (GdN) is one promising material for spintronics applications due to its predicted ferromagnetic nature. Unfortunately, a lack of clear understanding of the electronic structure of GdN limits the potential for device applications. Previous reports have likely suffered from a lack of consistently prepared samples with reported electronic properties ranging from insulating to semi-metallic. Here we report our study of the electronic properties of high quality [100]-textured GdN thin films synthesized using a chemical vapor deposition method. The films surface electronic properties were investigated using computational modeling coupled with photoelectron and inverse photoelectron spectroscopy. Our GGA+U calculations suggest that the theoretically predicted half-metallic electronic structure of GdN is likely due to its low density of states (DOS) at the Fermi level. These calculations are supported by our photoelectron spectroscopic measurements which show a band gap for the prepared films of a few milli-electron volts, consistent with the predicted electronic structure. Additionally, we will report the use of a gallium nitride capping layer to deter the surface oxidation of our GdN sample.

The strain dependence of electric and magnetic properties has been widely investigated, both from a fundamental science perspective and an applications point of view. Electromechanical coupling through field-induced polarization rotation (PRO) and polarization reorientation (PRE) in piezoelectric single crystals can provide an effective strain in film/substrate epitaxial heterostructures. However, the specific pathway of PRO and PRE is a complex thermodynamic process, depending on chemical composition, temperature, electric field and mechanical load. Most previous studies have focused on the macroscopic longitudinal strain along the direction of the external electric field, whereas only the transverse strain is transferred through interface to the thin film component. Here, systematic studies of the temperature-dependent field-induced phase transitions in Pb(Mg,Nb)O₃-PbTiO₃ single crystals with different initial phase and orientation configurations have been performed. Different types of strains, volatile/nonvolatile and biaxial/uniaxial, have been measured by both macroscopic and in-situ X-ray diffraction (XRD) techniques. In addition, the strain state of epitaxial Mn-doped CoFe₂O₄ thin films was examined by magnetic anisotropy measurements, where a giant magnetoelectric coupling has been demonstrated.

Reconfigurable electronics facilitates prototyping and represent a feasible solution for medium and low scale systems [1]. In Field-Programmable Gate Arrays (FPGAs), for example, different applications are implemented by arranging simple logic blocks through an array of switches. The ability of changing the status of those switches gives the FPGA its reconfigurable characteristic. The reconfigurable switches are usually made by a pass transistor which is controlled through flash memory elements. Integrating the flash transistor with the standardized CMOS incurs more costs and adds further complexity [2][3].
Phase-change material based switches have been proposed to replace the conventional transistor switches in different reconfigurable electronic applications, like FPGAs, reconfigurable arrays and RF circuits. However, their usage has so far been limited to replacement of the conventional transistor switches for low power applications [4][5].
In this work, we have computationally investigated multi-input multi-output (MIMO) phase-change device concepts to achieve signal routing and function implementations. These devices are integrated with CMOS to achieve functionality of conventional CMOS circuits in smaller footprints with built-in non-volatility. The operation of the proposed devices is achieved by forming highly resistive amorphous paths between different control terminals to isolate certain input and output terminals from each other. Some of these device structures are capable of achieving all possible 2-input 2-output combinations including the swap function. The electro-thermal simulations are performed using COMSOL Multiphysics including SPICE models of CMOS access devices. The simulation results show that this approach has a potential to replace the conventional routing approaches used in the low-power reconfigurable electronic circuits.
[1] Hauck, S.et al.. Totem: domain-specific reconfigurable logic. IEEE Transactions on VLSI Systems, 1-25..
[2] Chen, K. et al.. Programmable via using indirectly heated phase-change switch for reconfigurable logic applications. Electron Device Letters, IEEE, 29(1), 131-133.
[3] Gaillardon, P. E.et al . Phase-change-memory-based storage elements for configurable logic. In Field-Programmable Technology (FPT), 2010 International Conference on (pp. 17-20). IEEE (2010).
[4] Yoon, Sung-Min et al "Phase-Change-Driven Programmable Switch for Nonvolatile Logic Applications." Electron Device Letters, IEEE 30, no. 4 (2009): 371-373.
[5] Lo, Hsinyi, et al. "Three-Terminal Probe Reconfigurable Phase-Change Material Switches." Electron Devices, IEEE Transactions on57, no. 1 (2010): 312-320.

Resistive switches offer the prospect of improved performance, efficiency and scalability over current data storage methods. Many device architectures have been proposed, reliant upon a wide variety of materials whose conductance switches in a non-volatile manner with the application of an applied field. Silicon-based switching materials are of particular interest in these devices as they offer the added potential for integration into existing CMOS infrastructures. It is of great importance that the underlying physics of switching is well-understood, such that device optimisation and integration into commercial hardware may be realised. Our device layers are sputter-deposited to create a 37nm thick, non-stoichiometric, granular, silicon-rich layer of silica sandwiched between conductive electrodes. We report on the material changes leading to reversible resistive switching in silicon suboxide using secondary ion mass spectroscopy (SIMS), x-ray photoelectron spectroscopy (XPS), atomic force microscopy (AFM) and conductive atomic force microscopy (cAFM). Analysis with a range of techniques serves to highlight the broad dynamics of device behaviour, and supports the model of an ionic and defect-dependent switching mechanism which relies upon the presence of nanoscale grain boundaries within the silica switching layer.

The resistance change of oxide-based resistive switching memory devices is generally originated from the formation-and-rupture of a conductive filament via the aggregation of oxygen vacancies. In this work, impedance characteristics of bipolar resistive switching Ta/TaO_x/Pt memory device are investigated in various resistance states, including the pristine state, LRS (low resistive state), HRS (high resistive state). In HRS, the impedance data comprise a semi-circle in the Nyquist plot, indicating a parallel combination of resistor and capacitor. The semi-circle radius can be expended or reduced, depending on the magnitude and polarity of applied bias during impedance measurement. As the applied bias exceeds the turn-on voltage, the semi-circle radius in Nyquist plot shrinks abruptly because the parallel resistance becomes very small while the parallel capacitance remains a constant. In addition, an inductance is observed at the instance of sharp resistance drop. The impedance characteristics are discussed to explore the filament progression at the instant of resistance switching.