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Advanced Materials and Nanodevices for Brain-Inspired Computing
Show Abstract
The brain-inspired computing schemes are expected to reduce the time, energy and area required to propose solutions for a number of Artificial Intelligence-related applications.
Brain-inspired computing architectures can be implemented by analog or digital circuits using innovative materials and CMOS or beyond CMOS nanodevices, such as small slope switches, to potentially improve energy efficiency thanks to their steep subthreshold slope and low operating voltage.
The exploitation of the subthreshold FET characteristics, which naturally exhibit exponential relationships in their transfer functions, also allow to directly emulate the biophysics of neural systems.
On the other hand, the ability to alter the conductance levels in a controllable way makes Phase Change Memory devices particularly well-suited for synaptic realizations. The two key synaptic attributes of efficacy and plasticity can be efficiently realized using a unit comprising PCM devices and FETs.
In this presentation, we will show the disruptive properties of advanced NanoFETs for ultimate integration , reduction of energy consumption and enhanced performance, such as Nanowire FETs, Carbon NanoTube FETs, Tunnel FETs, Negative capacitance FETs, Hybrid Devices, combined with novel materials such as III-V, Ge, 2D/TMDs, Heterostructures, Phase Change, Nanofilament, Ferroelectric, Semimetal.
These innovative materials could be used for boosting NanoFETs electrical properties and/or developping new generation of memory devices, for instance Storage Class Memories, for near-memory computing where FET processing units are placed in close proximity to the memory unit for increased system performance. They can also be used for In-Memory Computing, for which the computation is performed in place by exploiting the physical attributes of memory devices organized as a computational memory unit [1-5].
[1] F. Balestra, Challenges for high performance and very low power operation at the end of the Roadmap, Solid-State Electronics, Volume 155, May 2019, pp. 27-31
[2] F. Balestra, Tunnel FETs for ultra low Power Nanoscale Devices, ISTE Open Science, Nanoelectronic Devices, Volume 18- 1, DOI : 10.21494/ISTE.OP.2018.0219
[3] F. Balestra, Challenges to Nano-scale Device World, ECS Transactions 66(5): 211-222, 2015
[4] F. Balestra, Beyond CMOS Nanodevices, Book (tome 1&2) edited by Francis Balestra, ISTE-Wiley, 2014
[5] F. Balestra, Advanced technologies for future materials and devices, Chapter in Springer Handbook of Semiconductor Devices, to be published, 2020